iWave iW-RainboW-G25M Page 42 Hardware User'S Manual Download

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REL0.1

Page 42 of 52

Snapdragon 820 SMARC SOM Hardware User Guide

iWave Systems Technologies Pvt. Ltd.

Pin

Signal Name

CPU Ball Name/

Pin Number

Signal Type/
Termination

Description

MIPI_CSI0_DLN2_P

MIPI_CSI0_DLN2_P
/BJ7

I, DIFF

MIPI CS0 differential data lane 2
positive

CLK3_OUT(GPIO_15)

GPIO_15/
BF8

O, 1.8V CMOS

General purpose Clock

MIPI_CSI0_DLN2_M

MIPI_CSI0_DLN2_
M/BH6

I, DIFF

MIPI CSI0 differential data lane 2
negative

GND

Power

Ground.

GND

Power

Ground.

MIPI_CSI2_DLN1_P

MIPI_CSI2_DLN1_P
/BC3

MIPI CSI2 differential data lane 0
positive

MIPI_CSI0_DLN3_P

MIPI_CSI0_DLN3_P
/BJ5

I, DIFF

MIPI CS0 differential data lane 3
positive

MIPI_CSI2_DLN1_M

MIPI_CSI2_DLN1_
M/BB4

I, DIFF

MIPI CSI2 differential data lane 0
negative

MIPI_CSI0_DLN3_M

MIPI_CSI0_DLN3_
M/BH4

I, DIFF

MIPI CSI0 differential data lane 3
negative

GND

Power

Ground.

GND

Power

Ground.

MIPI_CSI2_DLN2_P

MIPI_CSI2_DLN2_P
/BB2

I, DIFF

MIPI CSI2 differential data lane 2
positive

MIPI_CSI2_DLN0_P

MIPI_CSI2_DLN0_P
/BE1

I, DIFF

MIPI CS2 differential data lane 0
positive

MIPI_CSI2_DLN2_M

MIPI_CSI2_DLN2_
M/BA3

I, DIFF

MIPI CSI2 differential data lane 2
negative

MIPI_CSI2_DLN0_M

MIPI_CSI2_DLN0_
M/BD2

I, DIFF

MIPI CSI2 differential data lane 0
negative

GND

Power

Ground.

GND

Power

Ground.

MIPI_CSI2_DLN3_P

MIPI_CSI2_DLN3_P
/BA1

I, DIFF

MIPI CSI2 differential data lane 3
positive

MIPI_CSI2_DCLK_P

MIPI_CSI2_DCLK_P
/BF2

I, DIFF

MIPI CSI2 differential Clock positive

MIPI_CSI2_DLN3_M

MIPI_CSI2_DLN3_
M/AY2

I, DIFF

MIPI CSI2 differential data lane 3
negative

100

MIPI_CSI2_DCLK_M

MIPI_CSI2_DCLK_
M/
BE3

I, DIFF

MIPI CSI2 differential Clock
negative

Summary of Contents for iW-RainboW-G25M

Page 1: ...REL0 1 Page 1 of 52 Snapdragon 820 SMARC SOM Hardware User Guide iWave Systems Technologies Pvt Ltd iW RainboW G25M Snapdragon 820 SMARC SOM Hardware User Guide DRAFT VERSION SUBJECT TO CHANGE ...

Page 2: ...ntains proprietary material for the sole use of the intended recipient s Do not read this document if you are not the intended recipient Any review use distribution or disclosure by others is strictly prohibited If you are not the intended recipient or authorized to receive for the recipient you are hereby notified that any disclosure copying distribution or use of any of the information contained...

Page 3: ...n errata and associated issues Trademarks All registered trademarks product names mentioned in this publication are the property of their respective owners and used for identification purposes only Certification iWave Systems Technologies Pvt Ltd is an ISO 9001 2015 Certified Company Warranty RMA Warranty support for Hardware 1 Year from iWave or iWave s EMS partner For warranty terms go through t...

Page 4: ... Memory 15 2 5 1 LPDDR4 RAM 15 2 5 2 eMMC Flash 15 2 5 3 Micro SD Connector slot 16 2 6 Network Communiation 17 2 6 1 Wi Fi and Bluetooth Interface 17 2 6 2 GPS Interface 18 2 7 SMARC PCB Edge Connector 19 2 7 1 Gigabit Ethernet 20 2 7 2 SD Interface 20 2 7 3 Audio Interface 20 2 7 4 SPI Interface 20 2 7 5 USB Interface 21 2 7 6 PCIe Interface 21 2 7 7 HDMI Interface 21 2 7 8 MIPI DSI Display Inte...

Page 5: ...1 Power Input Sequencing 47 3 1 2 Power Consumption 47 3 2 Environmental Characteristics 48 3 2 1 Environmental Specification 48 3 2 2 RoHS Compliance 48 3 2 3 Electrostatic Discharge 48 3 3 Mechanical Characteristics 49 3 3 1 Snapdragon 820 SMARC SOM Mechanical Dimensions 49 4 ORDERING INFORMATION 50 5 APPENDIX 51 5 1 Snapdragon 820 SMARC SOM Development Platform 51 ...

Page 6: ...0 SMARC SOM Top View 49 Figure 9 Mechanical dimension of Snapdragon 820 SMARC SOM Side View 49 Figure 10 Snapdragon 820 SMARC SOM Development Platform 51 List of Tables Table 1 Acronyms Abbreviations 7 Table 2 Terminology 9 Table 3 Micro SD Connector Pin Out 16 Table 4 314 Pin PCB Edge Connector Pin Assignment 23 Table 5 Expansion Connector Pin Assignment 38 Table 6 JTAG Header Pin Assignment 43 T...

Page 7: ... System on Module is rich with features and comes in compact 82mm x 50mm form factor The Module PCBs have 314 edge fingers that mate with a low profile 314 pin 0 5mm pitch right angle connector The SMARC Specification describes the functionality of all 314pins The modular approach allows scalability fast time to market and upgradability while still maintaining low costs low power and small physica...

Page 8: ...PoP Package on Package RF Radio Frequency RoHS Restriction of Hazardous Substances RTC Real Time Clock SD Secure Digital SDRAM Synchronous Dynamic Random Access Memory SMARC SOM Smart Mobility ARChitecture SPMI Serial power management interface TBD To Be Defined UART Universal Asynchronous Receiver Transmitter USF Universal Flash Storage USB Universal Serial Bus USB OTG USB On The Go V Voltage Wi ...

Page 9: ...al Input output Signal CMOS Complementary Metal Oxide Semiconductor Signal DIFF Differential Signal LVDS Low Voltage Differential Signal OD Open Drain Signal OC Open Collector Signal Power Power Pin PU Pull Up PD Pull Down NA Not Applicable NC Not Connected Note Signal Type does not include internal pull ups or pull downs implemented by the chip vendors and only includes the pull ups or pull downs...

Page 10: ...ignal BLSP8_UART_TX is the functionality which we are using and GPIO_4 is the GPIO number If CPU pin has multiplexing option and selected as GPIO function then the signal name is mentioned as GPIO_Functionality Description GPIO Number Example GPIO_SDC2_WP GPIO_23 In this signal SDC2_WP is the GPIO functionality which we are using and GPIO_23 is the GPIO number If CPU pin doesn t have multiplexing ...

Page 11: ...r CCI_I2C2 BLSP2 UART PCIe to Gigabit Ethernet PCIe x 1 USB3 0 USB2_HS USB2 0 x 1 USB1_HS USB Device x 1 PCIe USB HUB 4Ports USB2 0 USB2 0 x 4 Gigabit Ethernet MI2S_2 MI2S_3 MI2S x 2 HDMI x 1 GNSS GNSS GPS RF Receiver Antenna Conn GNSS SDC2 SD x 1 BLSP7_I2C BLSP8 I2C I2C x 2 MPI CSI0 MIPI_CSI1 MPI_CSI X 2 BLSP1_SPI SSC_SPI_1 SPI x 2 MIPI Camera x 1 4lane each I2C x 1 for Camera GPIOs GPIOs Control...

Page 12: ...6 GHz Power Management PM8996 PMIC PMI8996 Battery Charger Memory 3GB LPDDR4 Expandable to 6GB 32GB eMMC Expandable to 128GB Micro SD Slot Network Communication Wi Fi and Bluetooth Module GPS Module USB3 0 Hub 1 4 Ports PCIe to Ethernet Bridge On Board Switches VOL Switch RST VOL Switch SMARC Edge Connector Interface MIPI CSI 2 lanes x 1 Port MIPI CSI 4 lanes x 1 Port Gigabit Ethernet x 1 Port SD ...

Page 13: ...TS x1 Ports SMARC GPIOs Power control Management signals Expansion Connectors Interface MIPI CSI 4 lanes x 1 Port SSC_UART x 3 Port SSC_I2C x 1 Port SLIMBUS x 1 Port Audio Code Inputs and Outputs Optional GPIO Optional Features Audio Codec UFS Universal Flash Storage Debug UART Header Battery Connector JTAG Header General Specification Power Supply 5V 3A Form Factor 82mm X 50mm SMARC V2 0 Specific...

Page 14: ... Hexagon 680 DSP enables the CPU to offload many tasks for more efficient processing Featuring Qualcomm All Ways Aware technology the Hexagon 680 DSP also allows for ultra low power always on sensors and advanced low power image processing The Adreno 530 in the Snapdragon 820 processor along with the Kryo CPU are capable of generating photorealistic graphics for console quality gaming and next gen...

Page 15: ...n power is directly connected to PMI8996 for Input power management Output power management battery monitoring and charging The PMI8996 mixed signal BiCMOS device is available in the 210 pin wafer level nanoscale package 210 WLNSP that includes ground pins for improved electrical ground mechanical stability and thermal conductivity 2 5 Memory 2 5 1 LPDDR4 RAM The Snapdragon 820 SMARC SOM supports ...

Page 16: ...nnector Table 3 Micro SD Connector Pin Out Pin No Pin Name Signal Name Signal Type Termination Description 1 DAT2 SDC4_DATA_2 GPIO_94 IO 1 8 V CMOS SD Interface Data Line2 2 DAT3 SDC4_DATA_3 GPIO_92 IO 1 8 V CMOS SD Interface Data Line3 3 CMD SDC4_CMD GPIO_91 IO 1 8 V CMOS SD Interface Command Line 4 VDD GND O 2 95V Power 2 95V Supply Voltage 5 CLK SDC4_CLK GPIO_93 IO 1 8 V CMOS SD Interface Clock...

Page 17: ... supports wireless local area network WLAN and Bluetooth BT combo solution to support 2x2 MIMO with IEEE802 11a b g n ac WLAN standards and BT4 1 HS enabling seamless integration of WLAN BT and Low Energy technology Two antennas can be connected on the module for good signal strength ANT1 is for WLAN BT and ANT2 is for WLAN only MHF 4 Micro RF Coaxl connectors are used for interfacing the RF anten...

Page 18: ...ver and fabricated using an advanced RF CMOS process that accommodates high frequency high precision analog circuits and low power CMOS functions Also WGR7640 chip is dedicated for GNSS receiver input for GPS GLONASS and COMPASS operations RF antenna need to be connected for better GPS locking function MHF 4 Micro R Coax connector is used for interfacing the GPS antenna J7 as shown in below figure...

Page 19: ...SAMRC PCB edge connector has standard pin out as per SMARC Specification 2 0 The interfaces which are available at 314pin SMARC Edge connector are explained in the following sections Figure 5 SMARC Edge Connector Number of Pins 314 Connector Part Not Applicable On Board PCB Edge connector Mating Connector 91782 3140M 001 from Aces ...

Page 20: ...apdragon 820 SMARC SOM supports 4bit SD interface over SMARC PCB Edge connector which can be used to connect SD card as Mass storage or optional boot device SDC2 controller of the APQ8096 CPU is used to support SMARC SD interface SDC2 supports maximum of 208 Mbit s per line and it operates both in 3 3V and 1 8V IO level For more details on SMARC Edge SD pinouts refer SAMRC Edge connector pins P33 ...

Page 21: ...irectly connected to SAMRC PCIe A Port pins along with other controlling signals PCIe0 and PCIe2 channel are also has an option to connected SMARC Edge connector provided Wi Fi and Ethernet will not be supported For more details on SMARC Edge PCIe pinouts refer SAMRC Edge connector pins P75 P80 P81 P83 P84 P86 P87 P89 P90 S76 S77 S78 S79 S81 S82 S84 S85 S87 S88 S90 S91 S146 on Table 6 2 7 7 HDMI I...

Page 22: ...R3 are without The APQ8096 CPU s BLSP9 BLSP10 BLSP11 are connected SER0 SER1 SER2 channels of SMARC Edge connector respectively Which can be used for any data commination Whereas BLSP8 UART is used as Debug UART Which will give the boot long and terminal access to the CPU In Snapdragon 820 SMARC SOM BLSP8 UART is connected to SER3 UART channel of SMARC Edge connector For more details on SMARC Edge...

Page 23: ...ntial data lane 1 positive P11 CSI1_RX1 MIPI_CSI1_DLN 1_M MIPI_CSI1_DLN1_ M BB6 I DIFF MIPI CSI1 differential data lane 1 negative P12 GND GND NA Power Ground P13 CSI1_RX2 MIPI_CSI1_DLN 2_P MIPI_CSI1_DLN2_P BA7 I DIFF MIPI CSI1 differential data lane 2 positive P14 CSI1_RX2 MIPI_CSI1_DLN 2_M MIPI_CSI1_DLN2_ M BA5 I DIFF MIPI CSI1 differential data lane 2 negative P15 GND GND NA Power Ground P16 CS...

Page 24: ...SP1_SPI_CS1_ N GPIO_90 GPIO_90 W3 O 1 8V CMOS SPI0 Chip Select 1 P32 GND GND NA Power Ground P33 SDIO_WP SDIO_WP GPIO_23 L5 I 3 3V CMOS SDC write Protect P34 SDIO_CMD SDC2_CMD SDC2_CMD AD6 IO 1 8 3 3V CMOS SD command P35 SDIO_CD SDIO_CD GPIO_38 BJ47 I 3 3V CMOS SD Card Detect P36 SDIO_CK SDC2_CLK SDC2_CLK AE5 O 1 8 3 3V CMOS SD Clock P37 SDIO_PWR_EN SDIO_PWR_EN GPIO_29 BG3 O 3 3V CMOS SD Power ena...

Page 25: ...Out Slave IN P58 ESPI_IO_1 SSC_SPI_1_MIS O SSC_11 SSC_11 C35 IO 1 8V CMOS SSC_SPI_1 Master IN Salve Out P59 GND GND NA Power Ground P60 USB0 USB1_HS_DP USB1_HS_DP AA3 IO DIFF USB Port0 Data Positive P61 USB0 USB1_HS_DM USB1_HS_DM AB4 IO DIFF USB Port0 Data Negative P62 USB0_EN_OC USB0_EN_OC GPIO_21 GPIO_21 H2 IO 3 3V CMOS USB Port0 Power Enable Over Current Indicator Note Connected via 1 8 to 3 3V...

Page 26: ...tor P76 USB4_EN_OC USB_HUB4_OC NA IO 3 3V CMOS USB Port4 Power Enable Over Current Indicator Note Connected to USB Hub P77 RSVD6 NC NA NA NA P78 RSVD7 NC NA NA NA P79 GND GND NA Power Ground P80 PCIE_C_REFCK NC NA NA NC Note Optionally connected to PCIE0_REFCLK_P P81 PCIE_C_REFCK NC NA NA NC Note Optionally connected to PCIE0_REFCLK_M P82 GND GND NA Power Ground P83 PCIE_A_REFCK PCIE1_REFCLK_ P PC...

Page 27: ...ff HDMI Transceiver CLK Positive P102 HDMI_CK DP1_LANE3 HDMI_TCLK_M HDMI_TCLK_M BG21 O Diff HDMI Transceiver CLK Negative P103 GND GND NA Power Ground P104 HDMI_HPD DP1_HPD HDMI_HOT_PLU G_DET GPIO_34 GPIO_34 BG45 I 1 8V CMOS HDMI Hot Plug Detect P105 HDMI_CTRL_CK DP1_AUX HDMI_DDC_CLK GPIO_32 GPIO_32 BH44 O 1 8V CMOS HDMI I2C Clock P106 HDMI_CTRL_DAT DP1_AUX HDMI_DDC_DA TA GPIO_33 GPIO_33 BH42 IO 1...

Page 28: ... BLSP8_I2C_CLK P122 I2C_PM_DAT NC NA NA NC Note optionally connected to BLSP8_I2C_DAT P123 BOOT_SEL0 BOOT_SEL0 NA I 1 8V CMOS Boot Media Select bit 0 P124 BOOT_SEL1 BOOT_SEL1 NA I 1 8V CMOS Boot Media Select bit 1 P125 BOOT_SEL2 BOOT_SEL2 NA I 1 8V CMOS Boot Media Select bit 2 P126 RESET_OUT RESOUT_N RESOUT_N B26 I 1 8V CMOS RESOUT from CPU to all other peripherals P127 RESET_IN RESIN_N_BTN NA I 1...

Page 29: ... P143 CAN0_TX NC NA NA NC P144 CAN0_RX NC NA NA NC P145 CAN1_TX NC NA NA NC P146 CAN1_RX NC NA NA NC P147 VDD_IN VDD_IN NA I 5V Power Supply Voltage P148 VDD_IN VDD_IN NA I 5V Power Supply Voltage P149 VDD_IN VDD_IN NA I 5V Power Supply Voltage P150 VDD_IN VDD_IN NA I 5V Power Supply Voltage P151 VDD_IN VDD_IN NA I 5V Power Supply Voltage P152 VDD_IN VDD_IN NA I 5V Power Supply Voltage P153 VDD_IN...

Page 30: ...SI0_DLN 1_M MIPI_CSI0_DLN1_ M I DIFF MIPI CSI0 differential data lane 1 negative S16 GND GND NA Power Ground S17 GBE1_MDI0 NC NA NA NA S18 GBE1_MDI0 NC NA NA NA S19 GBE1_LINK100 NC NA NA NA S20 GBE1_MDI1 NC NA NA NA S21 GBE1_MDI1 NC NA NA NA S22 GBE1_LINK1000 NC NA NA NA S23 GBE1_MDI2 NC NA NA NA S24 GBE1_MDI2 NC NA NA NA S25 GND GND NA Power Ground S26 GBE1_MDI3 NC NA NA NA S27 GBE1_MDI3 NC NA NA...

Page 31: ...8 IO 1 8V CMOS General Purpose I2C Data S50 HDA_SYNC I2S2_LRCK MI2S_3_WS GPI O_76 GPIO_76 G11 O 1 8V CMOS I2S Channel1 Left Right Clock S51 HDA_SDO I2S2_SDOUT MI2S_3_D1 GPI O_78 GPIO_78 F10 O 1 8V CMOS I2S Channel1 Data Output S52 HDA_SDI I2S2_SDIN MI2S_3_D0 GPI O_77 GPIO_77 C13 I 1 8V CMOS I2S Channel1 Data Input S53 HDA_CK I2S2_CK MI2S_3_SCK GP IO_75 GPIO_75 G9 O 1 8V CMOS I2S Channel1 Clock S54...

Page 32: ...SB Hub S72 USB2_SSTX USB3_HUB1_TX M NA O DIFF USB3 0 Port2 Transmit Negative Note Connected to USB Hub S73 GND GND NA Power Ground S74 USB2_SSRX USB3_HUB1_RX P NA I DIFF USB3 0 Port2 Receive Positive Note Connected to USB Hub S75 USB2_SSRX USB3_HUB1_RX M NA I DIFF USB3 0 Port2 Receive Negative Note Connected to USB Hub S76 PCIE_B_RST PCIE2_RST_N G PIO_35 GPIO_35 E3 O 3 3V CMOS PCIe 2 RESET OUT S77...

Page 33: ... S91 PCIE_B_TX NC NA NA NC Note Optionally connected to PCIE2_TX_M S92 GND GND NA Power Ground S93 DP0_LANE0 NC NA NA NA S94 DP0_LANE0 NC NA NA NA S95 DP0_AUX_SEL NC NA NA NA S96 DP0_LANE1 NC NA NA NA S97 DP0_LANE1 NC NA NA NA S98 DP0_HPD NC NA NA NA S99 DP0_LANE2 NC NA NA NA S100 DP0_LANE2 NC NA NA NA S101 GND GND NA Power Ground S102 DP0_LANE3 NC NA NA NA S103 DP0_LANE3 NC NA NA NA S104 USB3_OTG...

Page 34: ...D1Power Enable S117 LVDS1_2 eDP1_TX2 DSI1_D2 MIPI_DSI1_LN2 _P MIPI_DSI1_LN2_P BE29 O DIFF MIPI DSI1 differential data lane 2 positive S118 LVDS1_2 eDP1_TX2 DSI1_D2 MIPI_DSI1_LN2 _N MIPI_DSI1_LN2_N BD28 O DIFF MIPI DSI1 differential data lane 2 negative S119 GND GND NA Power Ground S120 LVDS1_3 eDP1_TX3 DSI1_D3 MIPI_DSI1_LN3 _P MIPI_DSI1_LN3_P BF28 O DIFF MIPI DSI1 differential data lane 3 positive...

Page 35: ...OS LCD0 Power Enable S134 LVDS0_CK eDP0_AUX DSI0_CLK MIPI_DSI0_CLK_ P MIPI_DSI0_CLK_P BF34 O DIFF MIPI DSI0 differential clock positive S135 LVDS0_CK eDP0_AUX DSI0_CLK MIPI_DSI0_CLK_ N MIPI_DSI0_CLK_N BE33 O DIFF MIPI DSI0 differential clock negative S136 GND GND NA Power Ground S137 LVDS0_3 eDP0_TX3 DSI0_D3 MIPI_DSI0_LN3 _P MIPI_DSI0_LN3_P BG33 O DIFF MIPI DSI0 differential data lane 3 positive S...

Page 36: ...ot be enabled while this signal is held low by the Carrier S151 CHARGING NC NA NA NA S152 CHARGER_PRSNT NC NA NA NA S153 CARRIER_STBY CARRIER_STBY NA O 1 8V CMOS 10K PU Carrier power should be enabled only after CARRIER_STBY goes High S154 CARRIER_PWR_ON CARRIER_PWR_ ON NA O 1 8V CMOS 10K PU Carrier power should be enabled only after CARRIER_PWR_ON goes High S155 FORCE_RECOV FORCE_RECOV NA I 1 8V ...

Page 37: ...onnector to utilise extra interfaces which is not covered under SMARC specificationV2 0 edge connector These signals are takeoutfrom SOM via 100pinexpansion connector and connector is placed on bottom side of the SOM Figure 6 SMARC Expansion Connector Number of Pins 100 Connector Part FX8C 100S SV 91 from Hirose Mating Connector FX8C 100P SV 91 from Hirose ...

Page 38: ... Hub 9 LINE_OUT2_M NA NA NC Note On SOM Audio Codec is not supported by default 10 USB3_HUB3_TXM NA I DIFF USB3 0 Port3 Transmit Negative Note Connected to USB Hub 11 GND NA Power Ground 12 GND NA Power Ground 13 LINE_OUT4 NA NA NC Note On SOM Audio Codec is not supported by default 14 USB3_HUB3_RXP NA I DIFF USB3 0 Port3 Receive Positive Note Connected to USB Hub 15 LINE_OUT3 NA NA NC Note On SOM...

Page 39: ...nnected to USB Hub 27 LINE_OUT1_P NA NA NC Note On SOM Audio Codec is not supported by default 28 USB3_HUB4_RXM NA I DIFF USB3 0 Port3 Receive Negative Note Connected to USB Hub 29 GND NA Power Ground 30 GND NA Power Ground 31 EAROM NA NA NC Note On SOM Audio Codec is not supported by default 32 AMIC1_INP NA NA NC Note On SOM Audio Codec is not supported by default 33 EAROP NA NA NC Note On SOM Au...

Page 40: ...NA NA NC Note On SOM Audio Codec is not supported by default 48 GPIO_149 GPIO_149 AM47 IO 1 8V CMOS General Purpose Input Output 49 DMIC1_CLK NA NA NC Note On SOM Audio Codec is not supported by default 50 GPIO_148 GPIO_148 AN47 IO 1 8V CMOS General Purpose Input Output 51 GND NA Power Ground 52 GPIO_10 GPIO_10 BH50 IO 1 8V CMOS General Purpose Input Output 53 EXP_SLIMBUS_DATA0 GPI O_71 GPIO_71 D1...

Page 41: ...X SSC_7 SSC_7 C31 IO 1 8V CMOS Sensor Core UART3 Receiver 67 MIC_BIAS4 NA NA NC Note On SOM Audio Codec is not supported by default 68 SSC_UART_3_TX SSC_6 SSC_6 E31 IO 1 8V CMOS Sensor Core UART3 Transmitter 69 GND NA Power Ground 70 SSC_I2C_2_SCL SSC_5 SSC_5 D30 O 1 8V CMOS Sensor Core I2C2 clock 71 SSC_I2C_3_SCL SSC_3 SSC_3 C37 O 1 8V CMOS Sensor Core I2C3 clock 72 SSC_I2C_2_SDA SSC_4 SSC_4 B36 ...

Page 42: ...a lane 0 negative 88 MIPI_CSI0_DLN3_M MIPI_CSI0_DLN3_ M BH4 I DIFF MIPI CSI0 differential data lane 3 negative 89 GND NA Power Ground 90 GND NA Power Ground 91 MIPI_CSI2_DLN2_P MIPI_CSI2_DLN2_P BB2 I DIFF MIPI CSI2 differential data lane 2 positive 92 MIPI_CSI2_DLN0_P MIPI_CSI2_DLN0_P BE1 I DIFF MIPI CS2 differential data lane 0 positive 93 MIPI_CSI2_DLN2_M MIPI_CSI2_DLN2_ M BA3 I DIFF MIPI CSI2 d...

Page 43: ...is is the optional feature and will not be populated in default configuration Number of Pins 20 Connector Part GRPB102MWCN RC from Sullins Connector Solutions Mating Connector LPPB102CFFN RC from Sullins Connector Solutions Table 6 JTAG Header Pin Assignment Pin No Signal Name Signal Type Termination Description 1 VCC_1V8 O 1 8V Power VTREF Voltage Reference 2 VCC_1V8 O 1 8V Power Supply Voltage 3...

Page 44: ...ble 7 Debug UART Header Pin Out Pin No Pin Name Signal Name Signal Type Termination Description 1 TX BLSP8_UART_TX O 3 3V CMOS0 UART8 Transmit 2 RX BLSP8_UART_RX I 3 3V CMOS0 10K PD UART8 Receive 3 GND GND Power Ground 2 9 3 Battery Connector The Snapdragon 820 SMARC is default powered with SMARC Edge connector pins but it as option to connect battery as a backup power supply source with On SOM Ba...

Page 45: ...fier with feedback speaker protection Note Contact iWave for more information 2 9 5 UFS Universal Flash Storage The Snapdragon 820 SMARC SOM supports 64GB UFS as optional boot device and storage The memory size of the UFS Flash can be expandable and the APQ8096 CPU UFS host controller is compliant with the following specifications JEDEC specification for Universal Flash Storage UFS JESD220B v2 0 J...

Page 46: ...IN pins and returned through the numerous GND pins on the connector A Module will withstand an indefinite exposure to an applied VDD_IN that may vary over the 4 2V to 5 25V range without damage and it will operate over the entire VDD_IN range of 4 2V to 5 25V Ten pins are allocated to VDD_IN The connector pin current rating is 0 5A per pin This works out to 5A total for the 10 pins Table 9 Power I...

Page 47: ...elow Figure 7 Power Input Sequencing Table 10 Power Sequence Timing Item Description Value T1 VDD_IN rise time to VIN_PWR_BAD rise time 0 ms T1A VIN_PWR_BAD rise time to SOM Power rise time 0 ms T3 SOM Power rise time to CARRIER_PWR_ON rise time 0 ms T4 CARRIER_PWR_ON rise time to CARRIER_STBY rise time 0 ms T5 CARRIER_STBY rise time to CARRIER POWER rise time 100 to 500ms 3 1 2 Power Consumption ...

Page 48: ...lation in the system system power supply etc Based on the system design specific heat dissipating approach might be required from system to system It is recommended to do the necessary system level thermal simulation and find necessary thermal solution in the system before using this board in the end application 3 2 2 RoHS Compliance iWave s Snapdragon 820 SMARC SOM is designed by using RoHS compl...

Page 49: ...low All dimensions are shown in mm Figure 8 Mechanical dimension of Snapdragon 820 SMARC SOM Top View Snapdragon 820 SMARC SOM PCB thickness is 1 2mm 0 15mm top side maximum height component is Diode D3 4mm followed by SD slot 1 93mm and bottom side maximum height component is expansion connector 3 95mm followed by IC U25 1 2mm Please refer the below figure which gives height details of the Snapdr...

Page 50: ... iWave for orderable part number of higher RAM memory size or Flash memory size SOM configurations Also if the desired part number is not listed in below table or if any custom configuration part number is required please contact iWave Table 12 Orderable Product Part Numbers Product Part Number Description Temperature iW G25M SC04 4L003G E032G ACA With APQ8096 CPU 3GB LPDDR4 32GB eMMC flash Wi Fi ...

Page 51: ...k validation of Snapdragon 820 CPU based SMARC SOM and its features Being a Nano ITX form factor with 120mm x 120mm size the carrier board is highly packed with all necessary interfaces on board connectors to validate complete SMARC supported features For more details on Snapdragon 820 SMARC SOM Development Platform visit the below web link http www iwavesystems com snapdragon 820 apq8096 smarc de...

Page 52: ...REL0 1 Page 52 of 52 Snapdragon 820 SMARC SOM Hardware User Guide iWave Systems Technologies Pvt Ltd ...

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