REL0.1
Page 35 of 52
Snapdragon 820 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SMARC Edge
Connector Pin Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
S128
/
e /
MIPI_DSI0_LN1
_P
MIPI_DSI0_LN1_P/
BH38
O, DIFF
MIPI DSI0 differential data
lane 1 positive
S129
LVDS0_1- /
eDP0_TX1- /
DSI0_D1-
MIPI_DSI0_LN1
_N
MIPI_DSI0_LN1_N/
BG37
O, DIFF
MIPI DSI0 differential data
lane 1 negative
S130 GND
GND
NA
Power
Ground.
S131
/
e /
MIPI_DSI0_LN2
_P
MIPI_DSI0_LN2_P/
BG35
O, DIFF
MIPI DSI0 differential data
lane 2 positive
S132
LVDS0_2- /
eDP0_TX2- /
DSI0_D2-
MIPI_DSI0_LN2
_N
MIPI_DSI0_LN2_N/
BH36
O, DIFF
MIPI DSI0 differential data
lane 2 negative
S133 LCD0_VDD_EN
LCD0_VDD_EN(
GPIO_120)
GPIO_120/
AU47
O, 1.8V CMOS LCD0 Power Enable
S134
L /
e /
D
MIPI_DSI0_CLK_
P
MIPI_DSI0_CLK_P/
BF34
O, DIFF
MIPI DSI0 differential clock
positive
S135
LVDS0_CK- /
eDP0_AUX- /
DSI0_CLK-
MIPI_DSI0_CLK_
N
MIPI_DSI0_CLK_N/
BE33
O, DIFF
MIPI DSI0 differential clock
negative
S136 GND
GND
NA
Power
Ground.
S137
/
e /
MIPI_DSI0_LN3
_P
MIPI_DSI0_LN3_P/
BG33
O, DIFF
MIPI DSI0 differential data
lane 3 positive
S138
LVDS0_3- /
eDP0_TX3- /
DSI0_D3-
MIPI_DSI0_LN3
_N
MIPI_DSI0_LN3_N/
BH34
O, DIFF
MIPI DSI0 differential data
lane 3 negative
S139 I2C_LCD_CK
BLSP8_I2C_SCL(
GPIO_7)
GPIO_7/
BB50
O, 1.8V CMOS I2C CLK for Display and
Touch
S140 I2C_LCD_DAT
BLSP8_I2C_SDA(
GPIO_6)
GPIO_6/
BC51
IO, 1.8V CMOS I2C DATA for Display and
Touch
S141 LCD0_BKLT_PWM
LCD0_BKLT_PW
M(PM_GPIO3)
NA
O, 1.8V CMOS
LCD0 Back Light Brightness
control PWM
Note: from PMIC
S142 RSVD9
NC
NA
NA
NA
S143 GND
GND
NA
Power
Ground.
S144 eDP0_HPD
NC
NA
NA
NA
S145 WDT_TIME_OUT#
WDT_TIME_OU
T#
GPIO_101/
AT52
O, 1.8V CMOS
Watch DOG Time Out
Interrupt