REL 1.2
Page 41 of 56
iWave Systems Technologies Pvt. Ltd.
i.MX6 SODIMM SOM Hardware User Guide
Interface/
Function
SODIMM
Edge Pin No
i.MX6 CPU
Pad Name
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
ALT8
ALT9
Default/
Reset State
DISP0_RGB
LCD
149
DISP0_DAT1
7
IPU1_DISP0_
DATA17
IPU2_DISP0_
DATA17
ECSPI2_MIS
O
AUD5_TXD
SDMA_EXT_
EVENT1
GPIO5_IO11
GPIO5_IO11
150
DISP0_DAT1
8
IPU1_DISP0_
DATA18
IPU2_DISP0_
DATA18
ECSPI2_SS0
AUD5_TXFS
AUD4_RXFS
GPIO5_IO12
EIM_CS2_B
GPIO5_IO12
152
DISP0_DAT1
9
IPU1_DISP0_
DATA19
IPU2_DISP0_
DATA19
ECSPI2_SCLK
AUD5_RXD
AUD4_RXC
GPIO5_IO13
EIM_CS3_B
GPIO5_IO13
153
DISP0_DAT2
0
IPU1_DISP0_
DATA20
IPU2_DISP0_
DATA20
ECSPI1_SCLK
AUD4_TXC
GPIO5_IO14
GPIO5_IO14
154
DISP0_DAT2
1
IPU1_DISP0_
DATA21
IPU2_DISP0_
DATA21
ECSPI1_MOS
I
AUD4_TXD
GPIO5_IO15
GPIO5_IO15
155
DISP0_DAT2
2
IPU1_DISP0_
DATA22
IPU2_DISP0_
DATA22
ECSPI1_MIS
O
AUD4_TXFS
GPIO5_IO16
GPIO5_IO16
156
DISP0_DAT2
3
IPU1_DISP0_
DATA23
IPU2_DISP0_
DATA23
ECSPI1_SS0
AUD4_RXD
GPIO5_IO17
GPIO5_IO17
145
DI0_DISP_CL
K
IPU1_DI0_DI
SP_CLK
IPU2_DI0_DI
SP_CLK
GPIO4_IO16
GPIO4_IO16
144
DI0_PIN2
IPU1_DI0_PI
N02
IPU2_DI0_PI
N02
AUD6_TXD
GPIO4_IO18
GPIO4_IO18
143
DI0_PIN3
IPU1_DI0_PI
N03
IPU2_DI0_PI
N03
AUD6_TXFS
GPIO4_IO19
GPIO4_IO19
146
DI0_PIN15
IPU1_DI0_PI
N15
IPU2_DI0_PI
N15
AUD6_TXC
GPIO4_IO17
GPIO4_IO17