REL 1.2
Page 30 of 56
i.MX6 SODIMM SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SODIMM Edge Connector
Pin Name
i.MX6 Ball Name/
Pin Number
Signal Type/
Termination
Description
111
SD3_DAT1
SD3_DAT1/
F14
IO, 3.3V CMOS SD3 Data1.
112
SD3_DAT2
SD3_DAT2/
A15
IO, 3.3V CMOS SD3 Data2.
113
GND
NA
Power
Ground.
114
SD3_DAT3
SD3_DAT3/
B15
IO, 3.3V CMOS SD3 Data3.
115
I2C3_SDA(GPIO_6)
GPIO_6/
T3
IO, 3.3V OD/
4.7K PU
I2C3 data.
116
I2C3_SCL(GPIO_3)
GPIO_3/
R7
O, 3.3V OD/
4.7K PU
I2C3 clock.
117
UART2_RXD(EIM_D27)
EIM_D27/
E25
I, 3.3V CMOS
UART2 serial data receiver.
118
UART2_TXD(EIM_D26)
EIM_D26/
E24
O, 3.3V CMOS
UART2 serial data transmitter.
119
GPIO5_IO18(CSI0_PIXCLK)
CSI0_PIXCLK/
P1
I, 3.3V CMOS
Parallel camera0 PIXCLK.
120
GPIO5_IO30(CSI0_DAT12)
CSI0_DAT12/
M2
I, 3.3V CMOS
Parallel camera0 data 0.
121
GPIO5_IO21(CSI0_VSYNC)
CSI0_VSYNC/
N2
I, 3.3V CMOS
Parallel camera0 VSYNC.
122
GPIO7_IO13(GPIO_18)
GPIO_18/
P6
IO, 3.3V CMOS General Purpose Input/Output.
123
GPIO5_IO19(CSI0_MCLK)
CSI0_MCLK/
P4
I, 3.3V CMOS
Parallel Camera0 HSYNC.
124
VIN_3V3
NA
I, 3.3V Power
Supply Voltage.
125
PWM2_OUT(SD1_DAT2)
SD1_DAT2/
E19
O, 3.3V CMOS
Pulse Width Modulation 2 Output.
126
GPIO5_IO20(CSI0_DATA_EN) CSI0_DATA_EN/
P3
I, 3.3V CMOS
Parallel Camera0 Data Enable.
127
PCIE_TXP
PCIE_TXP/
B3
O, DIFF/
0.1uf AC
coupled
PCIe differential transmit line positive.
128
PCIE_RXP
PCIE_RXP/
B2
O, DIFF
PCIe differential receive line positive
129
PCIE_TXM
PCIE_TXM/
A3
O, DIFF/
0.1uf AC
coupled
PCIe differential transmit line negative.
130
PCIE_RXM
PCIE_RXM/
B1
O, DIFF
PCIe differential receive line negative.
131
GND
NA
Power
Ground.