INMP441
APPLICATIONS INFORMATION
POWER-SUPPLY DECOUPLING
For best performance and to avoid potential parasitic artifacts, placing a 0.1 µF ceramic type X7R or better capacitor between Pin 7
(V
DD) and ground is strongly recommended. The capacitor should be placed as close to Pin 7 as possible.
The connections to each side of the capacitor should be as short as possible, and the trace should stay on a single layer with no vias.
For maximum effectiveness, locate the capacitor equidistant from the power and ground pins, or if equidistant placement is not
possible, slightly closer to the power pin. Thermal connections to the ground planes should be made on the far side of the capacitor,
as shown in Figure 13.
Figure 13. Recommended Power-Supply Bypass Capacitor Layout
V
DD
GND
TO GND
TO V
DD
CAPACITOR
Page 15 of 21
Document Number: DS-INMP441-00
Revision: 1.1
