Intel® Server Chassis SR1475 / Intel® Server System SR1475NH1-E
Revision 1.0
- 66 -
Figure 40. Turn On/Off Timing (Power Supply Signals)
6.31 Residual Voltage Immunity in Standby mode
The power supply should be immune to any residual voltage placed on its outputs (typically a
leakage voltage through the system from standby output) up to 500 mV. There shall be no
additional heat generated, nor stress of any internal components with this voltage applied to any
individual output, and all outputs simultaneously. It also should not trip the protection circuits
during turn on.
The residual voltage at the power supply outputs for no load condition shall not exceed 100 mV
when AC voltage is applied.
6.32 Protection Circuits
Protection circuits inside the power supply shall cause only the power supply’s main outputs to
shutdown. If the power supply latches off due to a protection circuit tripping, an AC cycle OFF
for 15 sec and a PSON
#
cycle HIGH for 1 sec shall be able to reset the power supply.
AC Input
Vout
PWOK
5VSB
PSON
T
sb_on_delay
T
AC_on_delay
T
pwok_on
T
vout_holdup
T
pwok_holdup
T
pson_on_delay
T
sb_on_delay
T
pwok_on
T
pwok_off
T
pwok_off
T
pson_pwok
T
pwok_low
T
sb_vout
AC turn on/off cycle
PSON turn on/off cycle
T
5VSB
_
holdup
Summary of Contents for SR1475
Page 87: ......
