Intel® Server Board S2600WF Product Family Technical Product Specification
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processor to independently configure and control the local system and provides isolation of the local host
memory domain from the remote host memory domain, while enabling status and data exchange between
the two domains. The NTB is discovered by the local processor as a Root Complex Integrated Endpoint
(RCiEP).
Figure 27 shows two systems that are connected through an NTB. Each system is a completely independent
PCIe hierarchy. The width of the NT Link can be x16, x8, or x4 at the expense of other PCIe root ports. Only
Port A can be configured as an NT port.
Figure 27. Two systems connected through an NTB
The specified processor family supports the following NTB features.
The NTB only supports one configuration/connection model:
•
NT Port attached to another NT Port of the same component type and generation
•
The NTB provides Direct Address Translation between the two PCIe Hierarchies through two separate
regions in Memory Space. Accesses targeting these Memory addresses are allowed to pass through
the NTB to the remote system. This mechanism enables the following transactions flows through the
NTB:
o
Both Posted Mem Writes and Non-Posted Mem Read transactions across the NTB
o
Peer-to-Peer Mem Read and Write transactions to and from the NTB
In addition, the NTB provides the ability to interrupt a processor in the remote system through a set of
Doorbell registers. A write to a Doorbell register in the local side of the NTB will generate an interrupt to the
remote processor. Since the NTB is designed to be symmetric, the converse is also true.
For additional information, refer to the Processor Family External Design Specification (EDS).
