Intel® Server Board S2600WF Product Family Technical Product Specification
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12.3.4.1
Memory Thermal Throttling
The system supports thermal management through closed loop throttling (CLTT) only. Throttling levels are
changed dynamically to cap throttling based on memory and system thermal conditions as determined by
the system and DIMM power and thermal parameters. The BMC fan speed control functionality is related to
the memory throttling mechanism used.
The following terminology is used for the various memory throttling options:
•
Static Closed-Loop Thermal Throttling (Static-CLTT): CLTT control registers are configured by the
BIOS Memory Reference Code (MRC) during POST. The memory throttling is run as a closed-loop sys-
tem with the DIMM temperature sensors as the control input. Otherwise, the system does not change
any of the throttling control registers in the embedded memory controller during runtime.
•
Dynamic Closed-Loop Thermal Throttling (Dynamic-CLTT): CLTT control registers are configured
by BIOS MRC during POST. The memory throttling is run as a closed-loop system with the DIMM tem-
perature sensors as the control input. Adjustments are made to the throttling during runtime based
on changes in system cooling (fan speed).
Intel® Server Systems supporting the Intel® Xeon® processor Scalable family support a type of CLTT, called a
hybrid CLTT, for which the integrated memory controller estimates the DRAM temperature in between actual
reads of the TSODs. Hybrid CLTT is used on all Intel Server Systems supporting the Intel Xeon processor
Scalable family that have DIMMs with thermal sensors. Therefore, the terms Dynamic-CLTT and Static-CLTT
are really referring to this “hybrid” mode. Note that if the IMC’s polling of the TSODs is interrupted, the
temperature readings that the BMC gets from the IMC are these estimated values.
12.3.4.2
Dynamic (Hybrid) CLTT
The system supports dynamic (memory) CLTT for which the BMC firmware dynamically modifies thermal
offset registers in the IMC during runtime based on changes in system cooling (fan speed). For static CLTT, a
fixed offset value is applied to the TSOD reading to get the die temperature; however this is does not provide
results as accurate when the offset takes into account the current airflow over the DIMM, as is done with
dynamic CLTT.
To support this feature, the BMC firmware derives the air velocity for each fan domain based on the PWM
value being driven for the domain. Since this relationship is dependent on the chassis configuration, a
method must be used which supports this dependency (for example, through OEM SDR) that establishes a
lookup table providing this relationship.
BIOS has an embedded lookup table that provides thermal offset values for each DIMM type and air velocity
range (three ranges of air velocity are supported). During system boot, BIOS provides three offset values
(corresponding to the three air velocity ranges) to the BMC for each enabled DIMM. Using this data the BMC
firmware constructs a table that maps the offset value corresponding to a given air velocity range for each
DIMM. During runtime the BMC applies an averaging algorithm to determine the target offset value
corresponding to the current air velocity and then the BMC writes this new offset value into the IMC thermal
offset register for the DIMM.
12.3.5
Power Management Bus (PMBus*)
The Power Management Bus (PMBus*) is an open standard protocol that is built upon the SMBus* 2.0
transport. It defines a means of communicating with power conversion and other devices using SMBus-
based commands. A system must have PMBus-compliant power supplies installed in order for the BMC or
Intel ME to monitor them for status and/or power metering purposes.
For more information on PMBus, see the System Management Interface Forum website,
