Intel Pentium III Processor/840, Manual, Page: 81 / 151

Intel
®
Pentium
®
III Processor/840 Development Kit Manual C-5
PLD Code Listing
hex = ADDR0; -- write cycle at XX2Xh. Go to latch data phase
else hex = my_reset;
end if;
control = gnd;
DOUT = DOUT; -- dummy
data_low[3..0] = data_low[3..0];
data_high[3..0] = data_high[3..0];
when ADDR0 =>
if (LFRAME_N == gnd) THEN
hex = my_reset;
elsif (LAD[3 .. 0] == H"0") THEN
hex = DIN_LOW; -- write cycle at XX2Eh. Go to latch data phase
else hex = my_reset;
end if;
control = gnd;
DOUT = DOUT; -- dummy
data_low[3..0] = data_low[3..0];
data_high[3..0] = data_high[3..0];
when DIN_LOW =>
if (LFRAME_N == gnd) THEN
hex = my_reset;
else hex = DIN_HIGH; -- next phase of latching data
end if;
control = gnd;
DOUT = DOUT; -- dummy
data_low[3..0] = LAD[3..0];
data_high[3..0] = data_high[3..0];
when DIN_HIGH =>
if (LFRAME_N == gnd) THEN
hex = my_reset;
else hex = TARIN1;
end if;
data_low[3..0] = data_low[3..0];
data_high[3..0] = LAD[3..0];
control = gnd;
DOUT = DOUT; -- dummy
when TARIN1 =>
if (LFRAME_N == gnd) THEN
hex = my_reset;
else hex = TARIN2; -- second turnaround phase
end if;
data_high[3..0] = data_high[3..0];
data_low[3..0] = data_low[3..0];
control = gnd;
DOUT = DOUT; -- dummy
when TARIN2 =>
if (LFRAME_N == gnd) THEN
hex = my_reset;
else hex = SYNC_RDY; -- No wait required in write cycle
end if;