
5-2
Intel
®
Pentium
®
III Processor/840 Development Kit Manual
BIOS Quick Reference
When a keyboard and video device are attached, system can display either a traditional character-
based PC BIOS display with memory count-up, or it can display a graphical POST with splash
screen and progress icons. Both POST displays accept a <DEL> key press to enter the setup screen,
and both display boot-time progress activity displays. The graphical display shows the status of file
system devices and even OEM-defined devices (when the OEM adapts the BIOS to a particular
OEM platform), but omits character-based PCI resource display. The text-based POST displays the
memory count-up and the PCI resource assignment table.
Figure 5-1 shows the format of the text-based POST display. The display is very similar if console
redirection through a COM port is used instead.
Figure 5-2 shows the graphical version of POST. The BIOS decompresses the main image, and can
display multiple overlaid graphics at various points in POST. The OEM can define the entire
sequence and control the timing of the system for an embedded application, and can arrange to
have different graphics displayed on each successive boot of the system. This feature is ideal for
embedded systems that must show evidence of operation during startup, while the application loads
underneath the splash screen. Once the application begins writing to the screen, the splash screen
relinquishes control, providing a seamless graphical progression for the end user.
Figure 5-1. BIOS POST Pre-Boot Environment
Summary of Contents for Pentium III Processor/840
Page 1: ...Intel Pentium III Processor 840 Development Kit Manual April 2001 Order Number 273333 003...
Page 74: ......
Page 76: ......
Page 92: ......
Page 95: ......
Page 97: ...Place inside the center of the socket Place around to socket Place one 820u close to VRM...
Page 98: ...Place one 820u close to VRM Place around the socket Place inside the center of the socket...
Page 100: ...2 3 0 1 2 No jumper Jumper position CPU VID 4 0 1 VRM VID 4 0...
Page 101: ......
Page 102: ......
Page 103: ...FSB ECC CONTROL IN ECC ENABLED...
Page 105: ......
Page 108: ...close Place to RIMM...
Page 109: ...to RIMM close Place...
Page 114: ......
Page 115: ......
Page 116: ......
Page 117: ......
Page 118: ...Place close to P1 Place close to P0...
Page 119: ...WAKE ON LAN HEADER WTX CHASSIS EXHAUST HEADDERS WTX IO HEADDERS P1 FAN HEADER P0 FAN HEADER...
Page 121: ......
Page 123: ...MCH HUBREF GENERATION Place close to ICH ICH DECOUPLING RTC BATTERY...
Page 124: ......
Page 125: ......
Page 126: ......
Page 127: ......
Page 128: ......
Page 129: ......
Page 130: ......
Page 131: ......
Page 132: ...Place close to P64H Rpack Decouple P64H HUBREF GENERATION...
Page 133: ...2 3 1 2 82559 EN DIS ENABLE DISABLE...
Page 135: ......
Page 136: ...to ICH close Place to ICH Place close...
Page 137: ...TBL jumper Remove in FAB B OUT IN UNLOCKED LOCKED...
Page 138: ...Place close to the power pins...
Page 139: ......
Page 140: ...Place RC networks close to the connector...
Page 142: ......
Page 143: ......
Page 144: ......
Page 145: ......
Page 146: ......
Page 147: ......
Page 151: ......