Documentation
Changes
R
Intel recommends that the I/O area on the top and bottom signal layers of a 4-layer motherboard
near the I/O back panel be filled with a ground fill as shown in Figures 1-4. In addition, a ground
fill cutout should be placed on the Vcc layer in the area where the ground fill is done on the top
and bottom layers. Intel recommends filling the I/O area as much as possible without effecting the
signal routing. The board designer should fill the entire I/O area along the board edge.
The spacing from the ground fill to other shapes/traces should be at least 20 mils. It is
recommended that these ground fill areas be connected to two chassis mounting holes (as seen in
Figure 2). This will allow ESD current to travel to the chassis instead of the board. Ground
stitching vias should be placed throughout the entire ground fill if possible. It is important that the
vias are placed along the board edge. Ground stitching vias for the ground fill should be 100-150
mils apart or less.
In conclusion, Intel recommends the following:
Fill the I/O area with the ground fill in all layers including signal layers whenever possible
•
•
•
•
Extend the ground fill along the entire back I/O area
Connect the ground fill to mounting holes
Place stitching vias 100-150 mils apart in the entire ground fill
Figure 1, Top signal layer before the ground fill near the I/O area
Ground Fill
Figure 2, Top signal layer after the ground fill near the I/O layer
Design Guide Update
13