Intel 82541PI, Design Manual

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82541PI(ER) and 82562GZ(GX) Dual Footprint LOM Design Guide
Application Note (AP-468) 47
5.0 Pin Number to Signal Mapping with Population
Options
Table 18 lists the pin names for the three controllers and the corresponding shared ball reference
value. Note that the 82541PI(ER) pin name in the 82541PI(ER) Datasheet/Design Guide is slightly
different from the signal name on the reference schematics. The Datasheet/Design Guide signal
names maintain consistency with the 64-bit gigabit controller naming conventions, while the
schematic names follow the conventions used by our engineers on their design tools.
Table 18. Ball Number to Signal Mapping (Sheet 1 of 8)
Population Options
Ball
Ref
82541ER
Pin
Name 82541PI
Pin
Name 82562GZ(GX)
Pin
Name
82541ER 82541PI 82562GZ(GX) Comments
A1 NC NC NC
A2 SERR# SERR# NC SERR# SERR# No stuff
A3 VCC 3.3 V VCC 3.3 V 3.3 V
A4 IDSEL IDSEL NC IDSEL IDSEL No stuff
A5 AD[25] AD[25] NC AD[25] AD[25] No stuff
A6 NC PME# NC No stuff PME# No stuff
A7 VCC 3.3 V VCC 3.3 V 3.3 V
A8 AD[30] AD[30] NC AD[30] AD[30] No stuff
A9 LAN_PWR_GOOD LAN_PWR_
GOOD NC Supervisor IC Supervisor IC No stuff
A10 VCC SMBCLK NC 3.3 V SMBCLK
A11 VCC 3.3 V VCC 3.3 V 3.3 V 3.3 V VCCT = 3.3 V
A12 LINK_LED# LED0/
LINK_UP# LILED# LINK_LED# LINK_LED# LINK_LED# Same signal -
different names.
A13 TEST TEST TESTEN Pull-down Pull-down Pull-down May have LAN
Disable logic
connected to this
signal for
82562GZ(GX).
An external
200
Ω
pull-up
resistor is also
required for the
82562GZ(GX).
A14 NC NC NC
B1 AD[22] AD[22] NC AD[22] AD[22] No stuff
B2 AD[23] AD[23] NC AD[23] AD[23] No stuff
B3 VSS VSS VSS
B4 AD[24] AD[24] NC AD[24] AD[24] No stuff
B5 AD[26] AD[26] NC AD[26] AD[26] No stuff
B6 AD[27] AD[27] NC AD[27] AD[27] No stuff
B7 VSS VSS VSS
B8 AD[31] AD[31] NC AD[31] AD[31] No stuff
B9 RST# RST# NC RST# RST# No stuff