TERMINAL DESCRIPTION(3/3)
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -26
Q3501: D788E001BRFP266/D708E001BRFP266 (Audio DSP)
DTR-7.8
PIN
SIGNAL NAME
TYPE
(1)
PULL
(2)
GPIO
(3)
DESCRIPTION
NO.
Clocks
OSCIN
23
I
-
N
1.2-V Oscillator Input
OSCOUT
24
O
-
N
1.2-V Oscillator Output
OSCV
DD
25
PWR
-
N
Oscillator 1.2-V V
DD
tap point (for filter only)
OSCV
SS
22
PWR
-
N
Oscillator V
SS
tap point (for filter only)
CLKIN
17
I
-
N
Alternate clock input (3.3-V LVCMOS Input)
PLLHV
27
PWR
-
N
PLL 3.3-V Supply Input (requires external filter)
Device Reset
RESET
14
I
-
N
Device reset pin
Emulation/JTAG Port
TCK
35
I
IPU
N
Test Clock
TMS
19
I
IPU
N
Test Mode Select
TDI
28
I
IPU
N
Test Data In
TDO
29
OZ
IPU
N
Test Data Out
TRST
21
I
IPD
N
Test Reset
EMU[0]
32
IO
IPU
N
Emulation Pin 0
EMU[1]
34
IO
IPU
N
Emulation Pin 1
Power Pins
Core Supply (CV
DD
)
8, 16, 20, 33, 44, 53, 57, 65, 77, 85, 90, 101, 123, 128, 132
IO Supply (DV
DD
)
10, 31, 42, 50, 60, 68, 73, 81, 92, 103, 112, 125, 136
Ground (V
SS
)
1, 6, 13, 15, 18, 26, 30, 36, 40, 47, 54, 62, 69, 72, 78, 82, 87, 95, 99, 106, 109, 114, 118, 124, 129, 133, 140
PIN
SIGNAL NAME
TYPE
(1)
PULL
(2)
GPIO
(3)
DESCRIPTION
NO.
External Memory Interface (EMIF) Data Bus
EM_D[0]
52
IO
-
N
EM_D[1]
51
IO
-
N
EM_D[2]
49
IO
-
N
EM_D[3]
48
IO
-
N
EM_D[4]
46
IO
-
N
EM_D[5]
45
IO
-
N
EM_D[6]
43
IO
-
N
EM_D[7]
41
IO
-
N
EMIF Data Bus [Lower 16 Bits]
EM_D[8]
66
IO
-
N
EM_D[9]
64
IO
-
N
EM_D[10]
63
IO
-
N
EM_D[11]
61
IO
-
N
EM_D[12]
59
IO
-
N
EM_D[13]
58
IO
-
N
EM_D[14]
56
IO
-
N
EM_D[15]
55
IO
-
N
