Infineon XMC4700, Manual

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2.6 Reset
The reset pin (PORST#) of the XMC4700/XMC4800 is a bi-directional pin in open drain mode. An internal pull-up
resistor keeps the PORST# pin high during normal operation. A low level at this pin will force a hardware reset.
In case of a MCU internal reset the PORST# pin will drive a low signal.
A reset signal can be issued by
•
the on-board Reset Button (SW102, “RESET”)
• the on-board debug probe (IC101.46)
• the external debugger connected to the 10-pin Cortex
™
Debug probe connector (X102)
• the Arduino Power Header (X302.3, “RESET”)
• the pin header X2 (X2.32, “RST#”)
An XMC
™
internal circuit always ensures a save Power-on-Reset. XMC
™
does not require any additional external
components to generate a reset signal during power-up.
2.7 CAN Transceiver
The XMC4700 Relax Kit and the XMC4800 Relax EtherCAT Kit provide a CAN interface via the X2 connector.
Infineon’s high speed CAN transceiver IFX1051LE for industrial application supports 3.3V I/O logic and is
suitable for 12V and 24V bus systems with an excellent EMC performance. The CAN bus (signals CANH, CANL) is
not terminated by a 120 Ohm and needs to be terminated externally.
Table 7 CAN Signals and XMC4700/XMC4800 Pin Mapping
Signal name Pin No. at Pin Header X2 XMC ™ Pin, XMC ™ Function
CANH X2.33 –
CANL X2.35 –
CAN_TX – P1.12, CAN.N1_TXD
CAN_RX – P1.13, CAN.N1_RXDC
2.8 Serial Flash Memory
The XMC4700 Relax Kit and the XMC4800 Relax EtherCAT Kit provide a 32 Mbit serial flash memory from Micron
(type: N25Q032A) interfaced to XMC4700/XMC4800 through a SPI interface. The SPI interface can be configured
as single, dual or quad SPI.
Table 8 XMC4700/XMC4800 Pins Mapping for Serial Flash Memory
XMC
™
Pin Function in qSPI Mode, XMC
™
Function
Function in SPI Mode, XMC
™
Function
P4.2 Clock, U2C1.SCLKOUT Clock, U2C1.SCLKOUT
P4.3 Chip Select, U2C1.SELO2 Chip Select, U2C1.SELO2
P4.7 Data Line 0 I/O, U2C1.DOUT0 Master Out Slave In (MOSI, MTSR), U2C1.DOUT0
P4.6 Data Line 1, U2C1.DOUT1 Master In Slave Out (MISO, MRST), U2C1.DX0E
P4.4 Data Line 3, U2C1.DOUT3 HOLD (low active)
P4.5 Data Line 2, U2C1.DOUT2 Write Protection (low active)
restricted - NDA required!
Evaluation Board for XMC4000 Family
XMC4700/XMC4800 Relax Kit Series-V1
2 Hardware Description
Board User Manual 13 Rev. 1.4
2022-06-20