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Infineon Technologies TLE5012B User Manual Download Page 83

TLE5012B

SSC Registers

  

User’s Manual

83

Rev. 1.2, 2018-02

   

Angle Revolution Register

AREV

Offset

Reset Value

Angle Revolution Register

04

H

8000

H

Field

Bits

Type

Description

RD_REV

15

r

Read Status, Revolution

0

B

 no new values since last readout

1

B

 new value (REVOL) present. The bit is cleared on 
a read-out (volid for both: normal operation and 
update buffer). Note: If an update event (register 
snapshot) is done after a normal read, RD_REV will 
not be set to 1

B

 in the following read (either update 

read or normal read) unless a new value is 
available.

Reset: 1

B

FCNT

14:9

wu

Frame Counter (unsigned 6-bit value)

Internal frame counter. Increments every update period 
(FIR_MD setting).
Reset: 0

H

REVOL

8:0

ru

Number of Revolutions (signed 9-bit value)

Revolution counter. Increments for every full rotation in 
counter-clockwise direction (at angle discontinuity from 
360° to 0°) and decrements for every full rotation in 
clockwise direction (at angle discontinuity from 0° to 
360°). Also see 

Chapter 4.2

.

Reset: 0

H

15

8

7

0

7

0

RD_REV

14

ru

wu

FCNT

REVOL

ru

ru

REVOL

9

Summary of Contents for TLE5012B

Page 1: ...Sense Control User s Manual Rev 1 2 2018 02 User s Manual TLE5012B Angle Sensor GMR Based Angle Sensor...

Page 2: ...y terms and conditions and prices please contact the nearest Infineon Technologies Office www infineon com Warnings Due to technical requirements components may contain dangerous substances For inform...

Page 3: ...f INTERNATIONAL ORGANIZATION FOR STANDARDIZATION MATLAB of MathWorks Inc MAXIM of Maxim Integrated Products Inc MICROTEC NUCLEUS of Mentor Graphics Corporation MIPI of MIPI Alliance Inc MIPS of MIPS T...

Page 4: ...ion 18 3 4 PWM interface push pull configuration 18 3 5 PWM interface open drain configuration 19 3 6 SPC interface 19 3 7 SSC interface push pull configuration 20 3 8 SSC interface open drain configu...

Page 5: ...HSM 55 5 6 Incremental Interface IIF 59 6 SSC Registers 64 6 1 Registers Overview 64 6 1 1 Bit Types 67 6 1 2 Communication Examples 68 6 1 3 Signed registers and Two s complement 70 6 1 4 Zero positi...

Page 6: ...luded if autocalibration is enabled 25 Figure 4 5 Delay of sensor output 26 Figure 4 6 Revolution counter with prediction mode disabled enabled 26 Figure 5 1 SSC timing 31 Figure 5 2 SSC data transfer...

Page 7: ...8 Figure 6 6 SSC command to change Interface Mode2 register 68 Figure 6 7 SSC data transfer sequence to change a configuration parameter 69 Figure 6 8 Example of a SSC data transfer sequence to change...

Page 8: ...tion 31 Table 5 3 SSC open drain timing specification 32 Table 5 4 Structure of the Command Word 33 Table 5 5 Structure of the Safety Word 34 Table 5 6 Bit Types 34 Table 5 7 PWM interface 47 Table 5...

Page 9: ...eters The precision of the angle measurement over a wide temperature range and a long lifetime can be improved by enabling an optional internal autocalibration algorithm Data communications are accomp...

Page 10: ...nterface IIF Hall Switch Mode HSM Short PWM Code SPC based on SENT protocol defined in SAE J2716 Output pins can be configured programmed or pre configured as push pull or open drain Bus mode operatio...

Page 11: ...gital Voltage Regulator VRD derived from VRA These regulators are directly connected to the supply voltage VDD 2 2 2 Oscillator and PLL The digital clock of the TLE5012B is provided by the Phase Locke...

Page 12: ...ion values e g offset amplitude synchronicity orthogonality These default values are set by laser fuses where they remain stored permanently At power on the values stored in the fuses are loaded into...

Page 13: ...demark designates Infineon products which contain SIL Supporting Features SIL Supporting Features are intended to support the overall System Design to reach the desired SIL according to IEC61508 or A...

Page 14: ...the arrows in the resistors represent the magnetic direction which is fixed in the Reference Layer On top of the Reference Layer and separated by a non magnetic layer there is a Free Layer When apply...

Page 15: ...TLE5012B Functional Description User s Manual 15 Rev 1 2 2018 02 Figure 2 5 Ideal output of the GMR sensor bridges V Angle 90 180 270 360 0 VX COS Y Component SIN VY SIN VY VX X Component COS...

Page 16: ...C External Clock1 IIF Index Hall Switch Signal 3 1 External clock feature is not available in IIF or HSM interface mode 2 SCK I SSC Clock 3 CSQ I SSC Chip Select 4 DATA I O SSC Data 5 IFA IIF_A HS1 P...

Page 17: ...TLE5012B E1000 is by default configured with push pull IFA IIF_A IFB IIF_ B and IFC IIF_IDX pins When the output pins are configurated as open drain three pull up resistors should be added e g 2k2 bet...

Page 18: ...fault configurated with push pull configuration for IFA PWM pin Internal pull up resistors are always available for DATA and CSQ pins see Datasheet It is recommended to connect CSQ pin to VDD to provi...

Page 19: ...B can be configured with SPC only Figure 3 6 This is only possible with the TLE5012B E9000 derivate which is by default configurated with an open drain IFA SPC pin In Figure 3 6 the IFC S_NR 1 and SCK...

Page 20: ...a bus system together with other SSC slaves e g two TLE5012B devices for redundancy reasons This mode can be activated using the bit SSC_OD Even though push pull configuration in a bus system is also...

Page 21: ...is sinking current through the OUT pin Depending on the external circuitry the additional current flow might disturb the bus behavior The figure below Figure 3 9 shows a typical implementation of a b...

Page 22: ...y one LSB only After the update autocalibration will already calculate new parameters again 11 Autocalibration Mode 3 Parameters are updated by one LSB at every angle range of 11 25 till the new autoc...

Page 23: ...ication When autocalibration is ON and has to be disabled write the correct CRC for autocalibration OFF before disabling autocalibration This way the sensor will see a consistent state when the first...

Page 24: ...ommended to wait three tupdate 3 42 7 s by default for time margin In case tupdate is configured to 85 s or higher extend the time to fulfill 3 tupdate This waiting time is also important before readi...

Page 25: ...d add it to the specified angle error which already contains lifetime drifts Some cases are shown in Table 4 2 As the magnetic field decreases with higher temperatures angle errors due to increases of...

Page 26: ...revolution counter always works with the measured angle current angle and not predicted angle Therefore the prediction angle may already indicate that the 0 has been crossed but the revolution counter...

Page 27: ...the fuses The temperature in degrees Celsius C can be calculated using the formula provided in Chapter 6 2 and reading the TEMPER bits TEMPER is a signed register to convert the value to digits proce...

Page 28: ...o the AS_RST bit address 01H 0 via SSC interface Within 120 s after the reset command write a 1 to the CLK_SEL bit address 06H 4 After the power on time max 7 ms read the CLK_SEL bit via SSC interface...

Page 29: ...esired the temperature can also be transmitted in two extra nibbles The SPC also sends a CRC and an end pulse to terminate the communication One line is needed for the transmission and the pins 1 and...

Page 30: ...um short Data rate high low medium low high high Resolution high high high low high Check IIF Index 0 pulse Phase A B as complementary signal Duty cycle range diagnostics CRC HS1 HS2 HS3as complementa...

Page 31: ...Values Unit Note Test Condition Min Typ Max SSC baud rate fSSC 8 0 Mbit s 1 1 Not subject to production test verified by design characterization CSQ setup time tCSs 105 ns 1 CSQ hold time tCSh 105 ns...

Page 32: ...k 1 1 Not subject to production test verified by design characterization CSQ setup time tCSs 300 ns 1 CSQ hold time tCSh 400 ns 1 CSQ off tCSoff 600 ns SSC inactive time1 SCK period tSCKp 500 ns 1 SCK...

Page 33: ...e access to current values or updated values If an update command is issued and the UPD bit is set the immediate values are stored in the update buffer simultaneously This enables a snapshot of all ne...

Page 34: ...VDD GND off ROM 0 Error occurred S_VR S_DSPU S_OV S_XYOL S_MAGOL S_FUSE S_ROM S_ADCT 1 No error 13 Interface access error access to wrong address wrong lock 0 Error occurred 1 No error 12 Invalid angl...

Page 35: ...flow occurs at address 3FH the transfer continues at address 00H If in the Command Word the number of data is zero ND 0 the register at the address given by ADDR is read but no Safety Word is sent by...

Page 36: ...from the slave sensor This step writing 0xFFFF has to be repeated as many times as reads from the slave are expected This is usually twice one for the data and one for the safety word Slave Number co...

Page 37: ...0001B in this case The write word 0804H is sent to enable Prediction one of the features available with the TLE5012B The PREDICT bit bit 2 of the WRITE Data 1 will be set at 1 Note Before sending a W...

Page 38: ...1 1 0 1 11 XOR 0 0 0 1 0 1 0 1 1 12 Generator polynomial 1 0 0 0 1 1 1 0 1 13 XOR 0 0 1 0 0 0 1 0 1 14 Generator polynomial 1 0 0 0 1 1 1 0 1 15 XOR 0 0 0 0 0 1 0 1 1 16 Generator polynomial 1 0 0 0 1...

Page 39: ...Bytelength crc defined as the 8 bits that will be generated through the message till the final crc is generated In the example above this are the blue lines out of the XOR operation unsigned char crc...

Page 40: ...the look up table LUT unsigned char CRC8 unsigned char message unsigned char Bytelength unsigned char TableCRC crc defined as the 8 bits that will be generated through the message till the final crc i...

Page 41: ...x7C 0x61 0x46 0x5B 0x08 0x15 0x32 0x2F 0x59 0x44 0x63 0x7E 0x2D 0x30 0x17 0x0A 0xB1 0xAC 0x8B 0x96 0xC5 0xD8 0xFF 0xE2 0x26 0x3B 0x1C 0x01 0x52 0x4F 0x68 0x75 0xCE 0xD3 0xF4 0xE9 0xBA 0xA7 0x80 0x9D 0...

Page 42: ...ing of the code provided above This code was used with an Infineon s microcontroller XC878 The CRC generation software code is only provided as a hint for the implementation or the use of the Infineon...

Page 43: ...Y_T value TCO_Y register address 0FH X_OFFSET value Offset X register address 0AH Y_OFFSET value Offset Y register address 0BH SYNCH value SYNCH register address 0CH ORTHO value IFAB register address...

Page 44: ...ted to have the 16 MSBs only arithmetic shift by 14 if supported by compiler architecture or signed division by 16384 The influence of the non orthogonality can be compensated using the following equa...

Page 45: ...end of line if desired In that case check the Application Note TLE5009 Calibration Angle Calculation Non Orthogonality Correction Amplitude Normalization Temperature dependent Offset Calculation Offse...

Page 46: ...formulas 5 6 The duty cycle range between 0 6 25 and 93 75 100 is used only for diagnostic purposes In case the sensor detects an error the corresponding error information will be transmitted by the P...

Page 47: ...rmula where tON is the length of the pulse in seconds and fPWM is the frequency selected 5 8 The frequency for the PWM interface can be selected via the register MOD_4 IFAB_RES bits as described in Ch...

Page 48: ...defines the value of a 4 bit nibble thus representing numbers between 0 and 15 The transmission time therefore depends on the transmitted data values The single edge is defined by a 3 Unit Time UT see...

Page 49: ...nibble has to be previously generated Figure 5 15 SPC configuration in open drain mode In parallel to SPC the SSC interface can be used for individual configuration The number of transmitted SPC nibb...

Page 50: ...f the unit time can be done within IFAB_HYST This enables a setup of different unit times Table 5 8 Frame configuration Frame type IFAB_RES Data nibbles 12 bit angle 00 3 nibbles 16 bit angle 01 4 nib...

Page 51: ...tal trigger time The SPC_Trigger is set to 0 by default For a variable length SPC Trigger Nibble and therefore an overall shorter SPC Frame the SPC_Trigger bit can be set to 1 via the SSC interface Th...

Page 52: ...e seed value 0101B line 2 Align the generator polynomial line 4 to the non zero MSB of the dataset out of the first step line 3 and calculate another XOR line 5 Figure 5 17 TLE5012B s CRC generator po...

Page 53: ...der has to be set with the original seed 0x05 for the TLE5012B crc 0x05 For all the nibbles of the message for Numnibbles 0 Numnibbles Length Numnibbles crc is calculated as the XOR operation from the...

Page 54: ...on Technologies components and shall not be regarded as any description or warrant of a certain functionalities conditions or quality of the Infineon Technologies component s All statements contained...

Page 55: ...onship between electrical angle and mechanical angle The mechanical 0 point is always used as reference The HSM is generally used with push pull output but it can be changed to open drain within the r...

Page 56: ...autocal 1 2 4 8 8 8 pole pairs with autocal 1 2 5 4 9 9 pole pairs with autocal 1 2 6 0 10 10 pole pairs with autocal 1 2 6 6 11 11 pole pairs with autocal 1 2 7 2 12 12 pole pairs with autocal 1 2 7...

Page 57: ...2 7 03 10 pole pairs IFAB_HYST 111 2 7 73 11 pole pairs IFAB_HYST 111 2 8 44 12 pole pairs IFAB_HYST 111 2 9 14 13 pole pairs IFAB_HYST 111 2 9 84 14 pole pairs IFAB_HYST 111 2 10 55 15 pole pairs IF...

Page 58: ...TLE5012B Interfaces User s Manual 58 Rev 1 2 2018 02 Figure 5 20 HS hysteresis Ideal Switching Point elect HShystel HShystel elect 0...

Page 59: ...adds the difference to the actual counter value to synchronize the TLE5012B with the microcontroller After startup the IIF transmits a number of pulses which correspond to the actual absolute angle va...

Page 60: ...ounting the numjber of pulses 5 9 Or measuring the length in seconds of the train of pulses 5 10 The actual increment needed to reach a new angle position is updated every update rate time tupd Depend...

Page 61: ...he internal Incremental Interface Counter steps over 0 The IIF Index pulse width t0 duration is specified in Table 5 13 Figure 5 25 IIF Index pulse in A B Mode tupd Phase B Phase A tupd tupd tupd tupd...

Page 62: ...to work in their normal operation mode Pulsing the missed pulses allows to count all the steps and correctly calculate the angle position The number of missed pulses depends on the hysteresis threshol...

Page 63: ...13 Incremental Interface Parameter Symbol Values Unit Note Test Condition Min Typ Max Incremental output frequency fInc 1 0 MHz Frequency of phase A and phase B1 1 Not subject to production test veri...

Page 64: ...is to address the demands for functional safety There are also yellow bits for the autocalibration and calibration values Finally the purple bits mark extra features that can be configured if desired...

Page 65: ...w ADC_X 10H X raw value Reg ADC_Y 11H Y raw value Reg D_MAG 14H D_MAG Reg T_RAW 15H T_RAW Reg T_TG L ru IIF_CNT 20H IIF Counter value Reg T25O 30H Temp 25 C Offset r TCO_Y_T w r ADC_Y Res w ORTHO w I...

Page 66: ...an be transmitted for different step resolutions from 0 088 to 0 703 For SPC it can be chosen if angle resolution should be in 12 or 16 bits or also if two extra nibbles for the temperature should be...

Page 67: ...ted before sending the command word As explained in Chapter 5 2 2 under the Data communication via SSC section the Update Event is generated by setting the CSQ line to low for 1 s tCSupdate This will...

Page 68: ...B 1 Command 1_0000_0_000010_0001 R W_Lock_UPD_ADD_ND 2 Read Data 1_xxxxxxxxxxxxxxx Transmit angle value 3 Safety Word 1_1_1_1_xxxx_xxxxxxxx Transmit safety word Micro controller TLE5012B 1 Command 1_0...

Page 69: ...er First the whole MOD_4 register is read The bits will be copied in the write word and only the two IFAB_RES bits changed to the desired configuration Finally a read confirms that the desired bits ha...

Page 70: ...is generated by the following equation 6 1 For example if the AVAL Register value is 1100 1101 1001 0011 the MSB indicates that the RD_AV field is high and a new angle value is present ANG_VAL ANG_VAL...

Page 71: ...rior to cut off the 3 LSBs 4 Subtract when ANG_DIR 0 or add when ANG_DIR 1 the 12 bit angle value obtained in step 3 from the value of the ANG_BASE register and store the result in the non volatile me...

Page 72: ...1 1 0 0 0 R MSB LSB MSB LSB MSB LSB 1 1 0 1 0 0 0 0 1 0 0 1 0 0 0 1 0 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 1 0 1 1 0 1 1 COMMAND twr_delay READ Data 1 SAFETY WORD D021H C439H FE3DH LOCK ADD...

Page 73: ...T STATus register 00H 75 ACSTAT ACtivation STATus register 01H 79 AVAL Angle VALue register 02H 81 ASPD Angle SPeeD register 03H 82 AREV Angle REVolution register 04H 83 FSYNC Frame SYNChronization re...

Page 74: ...fuses which are specific for the employed derivate Exxxx number of the TLE5012B In this case the reset values in the register table are marked as derivate specific A list of specific reset values for...

Page 75: ...new value is available Reset 1B S_NR 14 13 w Slave Number Used to identify up to four sensors in a bus configuration The levels on pin SCK and pin IFC can be used to change the default slave number f...

Page 76: ...and fast SSC read outs So the ADC BIST needs to be re run and pass to actually clear this error Activation in operation via AS_ADCT possible 0B Test vectors ok 1B Test vectors out of limit Reset 0B S_...

Page 77: ...f test not ok or self test is running Reset 0B S_FUSE 3 r Status Fuse CRC1 Cyclic CRC check of configuration registers 08H to 0FH and startup CRC check of configuration fuses A CRC error will remain a...

Page 78: ...ctivated pull up down active Reset 0B S_RST 0 ru Status Reset2 Indication that there has been a reset state 0B no reset since last readout 1B indication of power up short power break firmware or activ...

Page 79: ...1B activation of ADC Test vector Check Reset 1B for update buffer 0B if no update command send before AS_VEC_MAG 7 wu Activation of Magnitude Check 0B monitoring of magnitude disabled1 1B monitoring o...

Page 80: ...ator voltages disabled Clearing this activation bit will also disable reporting of S_VR error after a remaining error has been read out 1B check of regulator voltages enabled Reset 1B for update buffe...

Page 81: ...d on a read out valid for both normal operation and update buffer Note If an update event register snapshot is done after a normal read RD_AV will not be set to 1B in the following read either update...

Page 82: ...ead RD_AS will not be set to 1B in the following read either update read or normal read unless a new value is available Reset 1B ANG_SPD 14 0 ru Calculated Angle Speed Signed value where the sign bit...

Page 83: ...read RD_REV will not be set to 1B in the following read either update read or normal read unless a new value is available Reset 1B FCNT 14 9 wu Frame Counter unsigned 6 bit value Internal frame counte...

Page 84: ...64 FIR_MD 10 128 FIR_MD 11 Reset 0H TEMPER 8 0 ru Temperature Value Signed offset compensated temperature value Saturated below approx 30 C and above approx 140 C Compensation done by DSPU from T_RAW...

Page 85: ...e external clock disappears with CLK_SEL already set the chip will reset PLL out of lock and run on with the internal clock 0B internal oscillator 1B external 4 MHz clock IFC pin switched to input Res...

Page 86: ...it may occur due to an internal timing conflict that the switching command is not accepted and the chip keeps operating on internal clock SIL Register SIL Offset Reset Value SIL Register 07H 0000H Fie...

Page 87: ...est ADCs If enabled sensor elements are internally disconnected and test voltages are connected to ADCs NO_GMR_A and NO_GMR_XY status flags will be set to 1 if this bit is set during operation Test ve...

Page 88: ...6384 16383 200H factor 4 magnetic angle 45 45 mapped to values 16384 16383 Values outside this range are clamped to the limit value and S_OV flag is set 040H factor 0 5 magnetic angle 180 180 mapped t...

Page 89: ...nicity for applications with full turn Only 1 LSB corrected at each update CRC check of calibration registers is automatically disabled if AUTOCAL activated Autocalibration is described in the data sh...

Page 90: ...Pads Filters voltage spikes on input pads IFC SCK and CSQ Additional delay of 10 s for data input 0B spike filter disabled 1B spike filter enabled Reset derivate specific SSC_OD 2 w SSC Interface Data...

Page 91: ...digits 12 bit signed integer value of raw X signal offset correction at 25 C Reset device specific OFFY Offset Reset Value Offset Y 0BH device specific Field Bits Type Description Y_OFFSET 15 4 w Off...

Page 92: ...its Type Description SYNCH 15 4 w Amplitude Synchronicity 12 bit signed integer value of amplitude synchronicity correction raw X amplitude divided by raw Y amplitude For synchronicity correction the...

Page 93: ...gonality correction 2047D 11 2445 0D 0 2048D 11 2500 Reset device specific FIR_UDR 3 w FIR Update Rate Initial filter update rate FIR setting to be loaded into FIR_MD on startup Changing of the FIR se...

Page 94: ...e4 Register 0EH device specific Field Bits Type Description TCO_X_T 15 9 w Offset Temperature Coefficient for X Component 7 bit signed integer value of X offset temperature coefficient This register i...

Page 95: ...x0xxB absolute count enabled x1xxB absolute count disabled SPC Mode Total Trigger Time Duration of the master pulse to trigger SPC output 0000B 90 UT 0100B tmlow 12 UT Reset derivate specific IFAB_RE...

Page 96: ...C interface is always active in parallel on pins SCK CSQ and DATA 00B IIF 01B PWM 10B HSM 11B SPC1 Reset derivate specific 1 In SPC interface configuration the sensor s digital signal processing unit...

Page 97: ..._X_T and TCO_Y_T TCO_Y Offset Reset Value Temperature Coefficient Register 0FH device specific Field Bits Type Description TCO_Y_T 15 9 w Offset Temperature Coefficient for Y Component 7 bit signed in...

Page 98: ...ype Description ADC_X 15 0 r ADC value of X GMR 16 bit signed integer raw X value Read out of this register will update ADC_Y Reset 0H ADC_Y Offset Reset Value Y raw value 11H 0000H Field Bits Type De...

Page 99: ...Field Bits Type Description MAG 9 0 ru Angle Vector Magnitude Unsigned Angle Vector Magnitude after X Y error compensation due to temperature This field allows additional safety checks Formula MAG SQ...

Page 100: ...ggles after every new temperature value T_RAW Reset 0B T_RAW 9 0 ru Temperature Sensor Raw Value Temperature at ADC This value is not compensated with the offset temperature T_RAW range is not limited...

Page 101: ...and counter value on microcontroller side Therefore depending on the setting of the IFAB_RES register 9bit to 12bit resolution of incremental interface 2 to 5 LSBs have to be removed from IIF_CNT for...

Page 102: ...tage spike filter on input pads disabled 7 2 HSM type E3005 The TLE5012B E3005 is preconfigured for Hall Switch Mode and fast angle update rate 42 7 s It is most suitable as a replacement for three Ha...

Page 103: ...utput IFA IFB IFC pins set to weak driver DATA pin set to medium driver fast edge Voltage spike filter on input pads enabled 7 5 SPC type E9000 The TLE5012B E9000 is preconfigured for Short PWM Code i...

Page 104: ...LE5012B E1000 IIF 1 1 0 1 1 0 0 0 1 0 0 0 0 TLE5012B E3005 HSM 1 1 0 1 1 0 1 0 0 0 0 1 0 TLE5012B E5000 PWM 1 0 0 0 0 0 0 0 0 0 0 0 1 TLE5012B E5020 PWM 1 1 1 0 0 0 0 0 0 1 1 0 1 TLE5012B E9000 SPC 1...

Page 105: ...Published by Infineon Technologies AG w w w i n f i n e o n c o m...

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