IEI Technology WAFER-LX3, User Manual

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WAFER-LX3 3.5” Motherboard
Page 33
o
5, 6, 7, or 8-bit characters
o
Even, odd or no parity bit generation/detection
o
1, 1.5 or 2 stop bits generation
Internal diagnostic capabilities:
o
Loop-back control for communications link fault isolation
o
Break, parity, overrun, framing error stimulation
Programmable baud generator allows division of 1.8461 MHz and 24 MHz by
1 to (2
16
– 1)
Maximum baud rate up to 921 kbps for 14.769 MHz and 1.5 Mbps for 24 MHz
2.6.3.4 Super I/O Parallel Port
The Super I/O parallel port (LPT) is compatible with the following LPT specifications.
IBM parallel port compatible
PS/2 compatible bi-directional parallel port
Enhanced Parallel Port (EPP) mode supported. Compatible with IEEE 1284
specifications
Extended Parallel Port (EPP) mode supported. Compatible with IEEE 1284
specifications
Enhanced printer port back-drive current protection
The parallel port controller is connected to an external DB-26 LPT connector.
2.6.3.5 Super I/O Floppy Disk Drive (FDD) Controller
The Super I/O FDD controller is compatible with the following specifications.
IBM PC AT disk drive compatible
Variable write pre-compensation with track selectable capability
Vertical recording format supported
DMA logic enabled
16-byte data FIFOs
Overrun and under run conditions detected
Built-in address mark detection circuitry to simplify the read electronics
FDD anti-virus functions with software write protect and FDD write enable
signal