30
CPU MicroCode Update
When setting Enable, Bios will load CPU Microcode.
L1 Cache
The setting enabled or disabled the L1 cache memory in the processor.
L2 Cache
The setting enables L2 cache memory. If Enabled is selected, L2 cache
memory is enabled. If disabled is select, L2 cache memory is disabled.
System BIOS Cacheable
When this setting is set to enabled, the System ROM area from F0000-FFFFF
is copied (shadowed) to RAM for faster execution.
C000, 32k Shadow
T
his setting is about the contents inside the Video ROM area form
C000-C7FFF, which influences the speed of execution.
Disabled:
The contents of the video ROM are not copied to RAM.
Cached:
The contents of the video ROM area from C0000h - C7FFFh
are copied from ROM to RAM and can be written to or read
from cache memory.
Enabled: The
contents
of the video ROM area from C0000h - C7FFFh
are copied (shadowed) from ROM to RAM for faster
execution.
C800, 16k Shadow
These settings enable shadowing of the contents of the ROM area named in
the option title. The options are Enable Disable, Cached. The ROM area that
is not used by ISA adapter cards will be allocated to PCI adapter cards.000,
32k Shadow.
CC00, 16k Shadow
These settings enable shadowing of the contents of the ROM area named in
the setting title. The settings are Enable Disable, Cached. The ROM area that
is not used by ISA adapter cards will be allocated to PCI adapter cards.800,
16k Shadow.
D000, 16k Shadow
These settings enable shadowing of the contents of the ROM area named in
the setting title. The options are Enable, Disable, and Cached. The ROM area
that is not used by ISA adapter cards will be allocated to PCI adapter
cards.C00, 16k Shadow.
