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PCIE-9650 PICMG 1.3 CPU Card
Page 140
DRAM RAS# Activate to Precha [15 DRAM Clocks]
Use the
DRAM RAS# Activate to Precha
option to specify the length of the delay
between the activation and precharge commands for the RAS signal. That is how long
after activation can the access cycle be started again. This influences row activation time
that is considered when memory has hit the last column in a specific row, or when an
entirely different memory location is requested. (To be able to change this configuration
option the
Configure DRAM Timing by SPD
configuration option must be set to
“
Disabled
”) The following configuration options are available:
9 DRAM Clocks
10 DRAM Clocks
11 DRAM Clocks
12 DRAM Clocks
13 DRAM Clocks
14 DRAM Clocks
15 DRAM Clocks
D
EFAULT
Memory Hole [Disabled]
Use the
Memory Hole
option to reserve memory space between 15MB and 16MB for ISA
expansion cards that require a specified area of memory to work properly. If an older ISA
expansion card is used, please refer to the documentation that came with the card to see if
it is necessary to reserve the space.
Disabled D
EFAULT
Memory is not reserved for ISA expansion cards
15MB – 16MB
Between 15MB and 16MB of memory is reserved for
ISA expansion cards
Initiate Graphics Adapter [PEG/PCI]
Use the
Initiate Graphics Adapter
option to select the graphics controller used as the
primary boot device. Select either an integrated graphics controller (IGD) or a combination
of PCI graphics controller, a PCI express (PEG) controller or an IGD. Configuration
options are listed below:
Summary of Contents for PCIE-9650
Page 1: ...PCIE 9650 PICMG 1 3 CPU Card Page i...
Page 19: ...PCIE 9650 PICMG 1 3 CPU Card Page 1 1 Introduction Chapter 1...
Page 25: ...PCIE 9650 PICMG 1 3 CPU Card Page 7 2 Detailed Specifications Chapter 2...
Page 28: ...PCIE 9650 PICMG 1 3 CPU Card Page 10 Figure 2 3 Data Flow Block Diagram...
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Page 51: ...PCIE 9650 PICMG 1 3 CPU Card Page 33 3 Unpacking Chapter 3...
Page 57: ...PCIE 9650 PICMG 1 3 CPU Card Page 39 4 Connector Pinouts Chapter 4...
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Page 81: ...PCIE 9650 PICMG 1 3 CPU Card Page 63 5 Installation Chapter 5...
Page 109: ...PCIE 9650 PICMG 1 3 CPU Card Page 91 6 BIOS Screens Chapter 6...
Page 143: ...PCIE 9650 PICMG 1 3 CPU Card Page 125 BIOS Menu 15 PCI PnP Configuration...
Page 163: ...PCIE 9650 PICMG 1 3 CPU Card Page 145 7 Introduction Chapter 7...
Page 195: ...PCIE 9650 PICMG 1 3 CPU Card Page 177 A BIOS Options Appendix A...
Page 199: ...PCIE 9650 PICMG 1 3 CPU Card Page 181 B DIO Interface Appendix B...
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Page 203: ...PCIE 9650 PICMG 1 3 CPU Card Page 185 C Watchdog Timer Appendix C...
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Page 207: ...PCIE 9650 PICMG 1 3 CPU Card Page 189 D Address Mapping Appendix D...
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Page 211: ...PCIE 9650 PICMG 1 3 CPU Card Page 193 E Intel Matrix Storage Manager Appendix E...
Page 225: ...PCIE 9650 PICMG 1 3 CPU Card Page 207 F Index...