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IDT 89EBPES48H12, Manual

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IDT 89EBPES48H12 Manual Download Page 28

IDT   Installation of the EB64H16 Eval Board

EB64H16 Eval Board Manual

2 - 16

January 16, 2007

Notes

W88

Header

Shunted

Bypass hot-plug controller - Enables direct power (+12V and 
+3.3V) to Ports 13 

(Default)

W91

Header

Shunted

Bypass hot-plug controller - Enables direct power (+12V and 
+3.3V) to Ports 14 

(Default)

W92

Header

Shunted

Bypass hot-plug controller - Enables direct power (+12V and 
+3.3V) to Ports 15 

(Default)

W97

Header

Shunted

2-3: Port 1, 3.3Vaux source from External Power 

(Default)

1-2: Port 1, 3.3Vaux source from hot-plug controller

W69

Header

2-3 Shunted

2-3: Port 2, 3.3Vaux source from External Power 

(Default)

1-2: Port 2, 3.3Vaux source from hot-plug controller

W70

Header

2-3 Shunted

2-3: Port 3, 3.3Vaux source from External Power 

(Default)

1-2: Port 3, 3.3Vaux source from hot-plug controller

W73

Header

2-3 Shunted

2-3: Port 4, 3.3Vaux source from External Power 

(Default)

1-2: Port 4, 3.3Vaux source from hot-plug controller

W74

Header

2-3 Shunted

2-3: Port 5, 3.3Vaux source from External Power 

(Default)

1-2: Port 5, 3.3Vaux source from hot-plug controller

W77

Header

2-3 Shunted

2-3: Port 6, 3.3Vaux source from External Power 

(Default)

1-2: Port 6, 3.3Vaux source from hot-plug controller

W78

Header

2-3 Shunted

2-3: Port 7, 3.3Vaux source from External Power 

(Default)

1-2: Port 7, 3.3Vaux source from hot-plug controller

W81

Header

2-3 Shunted

2-3: Port 8, 3.3Vaux source from External Power 

(Default)

1-2: Port 8, 3.3Vaux source from hot-plug controller

W82

Header

2-3 Shunted

2-3: Port 9, 3.3Vaux source from External Power 

(Default)

1-2: Port 9, 3.3Vaux source from hot-plug controller

W85

Header

2-3 Shunted

2-3: Port 10, 3.3Vaux source from External Power 

(Default)

1-2: Port 10, 3.3Vaux source from hot-plug controller

W86

Header

2-3 Shunted

2-3: Port 11, 3.3Vaux source from External Power 

(Default)

1-2: Port 11, 3.3Vaux source from hot-plug controller

W89

Header

2-3 Shunted

2-3: Port 12, 3.3Vaux source from External Power 

(Default)

1-2: Port 12, 3.3Vaux source from hot-plug controller

W90

Header

2-3 Shunted

2-3: Port 13, 3.3Vaux source from External Power 

(Default)

1-2: Port 13, 3.3Vaux source from hot-plug controller

W93

Header

2-3 Shunted

2-3: Port 14, 3.3Vaux source from External Power 

(Default)

1-2: Port 14, 3.3Vaux source from hot-plug controller

W94

Header

2-3 Shunted

2-3: Port 15, 3.3Vaux source from External Power 

(Default)

1-2: Port 15, 3.3Vaux source from hot-plug controller

W99

Header

2-3 Shunted

2-3: Port 1, +12V source base on W91 

(Default)

1-2: Port 1, +12V source from hot-plug controller

W103

Header

2-3 Shunted

2-3: Port 2, +12V source base on W57

(Default)

1-2: Port 2, +12V source from hot-plug controller

W104

Header

2-3 Shunted

2-3: Port 3, +12V source base on W58

 (Default)

1-2: Port 3, +12V source from hot-plug controller

Miscellaneous Jumpers, Headers

Ref. 

Designator

Type

Default

Description

Table 2.17  Miscellaneous Jumpers, Headers  (Part 2 of 4)

Summary of Contents for 89EBPES48H12

Page 1: ...lley Road San Jose California 95138 Telephone 800 345 7015 408 284 8200 FAX 408 284 2775 Printed in U S A 2007 Integrated Device Technology Inc IDT 89EBPES64H16 89EBPES48H12 89EBPES48T12 Evaluation Bo...

Page 2: ...ure Analysis be performed LIFE SUPPORT POLICY Integrated Device Technology s products are not authorized for use as critical components in life support devices or systems unless a specific written agr...

Page 3: ...age Converter 2 8 PCI Express Digital Power Voltage Converter 2 8 PCI Express Analog Power Voltage Converter 2 8 Core Logic Voltage Converter 2 8 3 3V I O Power Module 2 8 Power up Sequence 2 8 Requir...

Page 4: ...IDT Table of Contents EB64H16 Eval Board Manual ii January 16 2007 Notes...

Page 5: ...tion 2 9 Table 2 9 Boot Configuration Vector Signals 2 10 Table 2 10 Boot Configuration Vector Switches S19 S20 S21 ON 0 OFF 1 2 11 Table 2 11 Slave SMBus Interface Connector 2 12 Table 2 12 SMBus Sla...

Page 6: ...IDT Table of Contents EB64H16 Eval Board Manual iv January 16 2007 Notes...

Page 7: ...unctional Block Diagram of the EB48H12 and EB48T12 Eval Boards 1 2 Figure 2 1 PCIe Adapter 2 1 Figure 2 2 SuperMicro X6DH8 G2 Motherboard 2 3 Figure 2 3 Clock Distribution Block Diagram 2 5 Figure 2 4...

Page 8: ...IDT List of Figures EB64H16 Eval Board Manual vi January 16 2007 Notes...

Page 9: ...luation Board also referred to as EB64H16 These refer ences to the EB64H16 should be interpreted as also applying to both an EB48H12 board and an EB48T12 board except where noted Introduction The EB64...

Page 10: ...nstream x4 P3 P2 Downstream x4 P M Downstream x4 Downstream x4 P M Downstream x4 Downstream x4 P M Downstream x4 Downstream x4 P M Downstream x4 Downstream x4 P M Downstream x4 Downstream x4 P M Downs...

Page 11: ...n or eleven downstream ports from the upstream clock ref erence or from an on board clock generator The clock generator has spread spectrum clocking option and SMA connectors are provided to monitor t...

Page 12: ...allation programs Operating Systems Supported Windows2000 WindowsXP Linux GUI based application for Windows and Linux Allows users to view and modify registers in the PES64H16 Binary file generator fo...

Page 13: ...ll jumpers and switches configured to their default settings In most cases the board does not require further modification or setup PCI Express Adapter Card The PCI Express adapter card contains eight...

Page 14: ...4 ports see section PCI Express Personality Module on page 2 23 Basic requirements for the board to run are Host system with a PCI Express root complex supporting x8 configuration through a PCI Expres...

Page 15: ...se clocks from a common source which is user selectable The common source can be either the host system s reference clock or the onboard clock generator Selection is made by stuffing resistors describ...

Page 16: ...must be disabled and the upstream reference clock must be used instead The output of the two onboard clock generator is accessible through four SMA connectors located on the Evaluation Board See Table...

Page 17: ...IDT Installation of the EB64H16 Eval Board EB64H16 Eval Board Manual 2 5 January 16 2007 Figure 2 3 Clock Distribution Block Diagram...

Page 18: ...from the 12V from an external power connector See Figure 2 4 A 12V to 2 5V DC DC converter is used to provide power to four LDO linear regulators to generate VDDCORE VDDPEe VDDAPE and VTTPE voltages T...

Page 19: ...to enable power on switch Power Supply Minimum Load Connectors To provide the minimum load requirement for each rail of the EPS12V supply a 2 pin fan connector is provided for connecting to an extern...

Page 20: ...abilize prior to applying the next voltage in the sequence to ensure internal latch up issues are avoided There are no maximum time limitations between sequential valid power level requirements Requir...

Page 21: ...GPIO pins or a fundamental reset through PERST Selection is made by jumpers described in Table 2 8 Port Jumper Selection 1 W102 1 2 Software controlled reset through GPIO6 2 3 Fundamental reset PERST...

Page 22: ...3 Merge When this pin is asserted i e low port 2 is merged with port 3 to form a single x8 port Default 0x1 P45MERGEN Port 4 and 5 Merge When this pin is asserted i e low port 4 is merged with port 5...

Page 23: ...eam port 0xC through 0xF Reserved REFCLKM PCI Express Reference Clock Mode Select This signal selects the frequency of the ref erence clock input Default 0x0 0x0 100 MHz 0x1 125 MHz MSMBADDR 4 1 Maste...

Page 24: ...registers The Master SMBus interface provides connection to the external serial EEPROMs used for initialization and the I O expander used for hot plug signals SMBus Slave Interface On the EB64H16 boa...

Page 25: ...istor as 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 and 0xA respectively The bus address for the selected EEPROM device is 0b1000 by default and is configurable using W145 and the switch S21 as described...

Page 26: ...N OFF 0b0101 1001 OFF ON ON ON 0b0101 1000 ON ON ON ON 0b0101 0000 Default JTAG Connector J33 Pin Signal Direction Pin Signal Direction 1 TRST Test reset Input 2 GND 3 TDI Test data Input 4 GND 5 TDO...

Page 27: ...s 3 Default W70 Header Shunted Bypass hot plug controller Enables direct power 12V and 3 3V to Ports 4 Default W71 Header Shunted Bypass hot plug controller Enables direct power 12V and 3 3V to Ports...

Page 28: ...Header 2 3 Shunted 2 3 Port 8 3 3Vaux source from External Power Default 1 2 Port 8 3 3Vaux source from hot plug controller W82 Header 2 3 Shunted 2 3 Port 9 3 3Vaux source from External Power Default...

Page 29: ...om hot plug controller W139 Header 2 3 Shunted 2 3 Port 14 12V source base on W91 Default 1 2 Port 14 12V source from hot plug controller W140 Header 2 3 Shunted 2 3 Port 15 12V source base on W92 Def...

Page 30: ...2 3 Shunted 2 3 Port 15 3 3V source base on W92 Default 1 2 Port 15 3 3V source from hot plug controller Location Color Definition DS87 Green Port1 Power is good indicator DS74 Green Port2 Power is go...

Page 31: ...ator DS22 Green Port4 Power Indicator DS23 Green Port5 Power Indicator DS24 Green Port6 Power Indicator DS25 Green Port7 Power Indicator DS26 Green Port8 Power Indicator DS27 Green Port9 Power Indicat...

Page 32: ...Port8 Link Up Status Output DS38 Green Port9 Link Up Status Output DS39 Green Port10 Link Up Status Output DS40 Green Port11 Link Up Status Output DS41 Green Port12 Link Up Status Output DS47 Green Po...

Page 33: ...EFCLK REFCLK Reference clock 14 PETp0 Transmitter differential REFCLK differential pair 15 PETn0 pair Lane 0 GND Ground 16 GND Ground PERp0 Receiver differential 17 PRSNT2 Hot Plug presence detect PER...

Page 34: ...nd 50 PETp8 Transmitter differential RSVD Reserved 51 PETn8 pair Lane 8 GND Ground 52 GND Ground PERp8 Receiver differential 53 GND Ground PERn8 pair Lane 8 54 PETp9 Transmitter differential GND Groun...

Page 35: ...personality module connector eight PCI Express lanes are routed to the even port and the odd port is disconnected Note that all eight connectors must have a personality module inserted whether all sid...

Page 36: ...JTAG Header Reset IDT 64 Lanes 16 Ports USPCTL Header Slave SMBus Master SMBus EEPROM IO EXPs P M P5 P4 P7 P6 Downstream x4 Upstream x8 P1 P0 P M Downstream x4 P3 P2 Downstream x4 P M Downstream x4 Do...

Page 37: ...oard Block Diagram 25MHz SSC Clock Clock Fanout JTAG Header Reset IDT 48 Lanes 12 Ports USPCTL Header Slave SMBus Master SMBus EEPROM IO EXPs P M P M P M P M Downstream x8 Downstream x4 Downstream x8...

Page 38: ...IDT Installation of the EB64H16 Eval Board EB64H16 Eval Board Manual 2 26 January 16 2007...

Page 39: ...te a configuration file into an EEPROM programmable data structure This enables the user to program an appropriate serial EEPROM with desirable register settings for the PES64H16 and then to populate...

Page 40: ...IDT Software for the EB64H16 Eval Board EB64H16 Eval Board Manual 3 2 January 16 2007 Notes...

Page 41: ...Notes EB64H16 Eval Board Manual 4 1 January 16 2007 Chapter 4 Schematics Schematics...

Page 42: ...15 HOT PLUG CONTROL PORT 8 9 11 IO EXPANDER LINK STATUS SHEET DESCRIPTION 2 BLOCK DIAGRAM 4 CLOCK REFERENCE 6 CLOCK DISTRIBUTION P6 10 8 IO EXPANDER P1 P8 9 IO EXPANDER P9 P15 89HPES64H16 EVALUATION...

Page 43: ...07 J CARRILLO STGSCH 00100 89EBPES64H16 B BLOCK DIAGRAM TITLE DRAWING NO AUTHOR CHECKED BY COPYRIGHT C IDT 3 SIZE REV FAB P N 1 1 A A B B C C D D 2 2 4 4 5 6 6 7 7 8 3 8 5 6024 SILVER CREEK VALLEY RD...

Page 44: ...MIC49500WR 0 1UF 0 1UF 330UF 0 1UF 10V 0 25V 16V 0 1UF 22UF 28 47UF 100 1 100 6V 1 130 1 1 330UF 0 1UF 100 1 47UF 0 1UF 150 25V 25V 0 1UF 1UF 47UF 0 MIC49500WR MIC49500WR 1 130 1 0 0 0 1 1 100 100 0 1...

Page 45: ...9 49 9 5 5 5 10K 10K 10K SG 8002CA25 0000 PCB 1 28 28 5 5 5 6 6 7 7 5 6 6 7 7 CONNSMA CONNSMA CONNSMA CONNSMA CG_PECLK0P CG_PECLK0N CLOCK REFERENCE 400MA CG_PECLK1P CG_PECLK1N CG_PECLK2P CG_PECLK2N C...

Page 46: ...2 1 22 1 22 1 22 1 REFCLKN 49 9 49 9 49 9 49 9 49 9 49 9 49 9 49 9 49 9 49 9 49 9 49 9 49 9 1 475 0 1UF REFCLK0N 0 1UF REFCLK0P 0 1UF 1 10K 1 10K 1 10K 1 10K NA DNP NA DNP NA DNP NA DNP 4 11 CLOCK DIS...

Page 47: ...RGDN P10_PWRGDN 38 REFCLK2P 0 1UF REFCLK2N 1 49 9 1 49 9 49 9 49 9 49 9 49 9 49 9 49 9 49 9 49 9 1 1 1 1 1 1 1 1 49 9 1 10K 1 NA 1 NA NA DNP 1 10K NA DNP 1 10K 10K 1 1 10K 0 1UF 1 475 1 22 1 22 1 P10_...

Page 48: ...0 1UF 0 1UF 16V 1UF 0 1UF 16V 1UF 0 0 0 0 0 0 4 4 4 4 16 11 17 11 17 11 18 11 18 475 1 34 35 DNP 0 0 35 35 33 33 49 9 1 49 9 1 49 9 1 49 9 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 49 9 1 1 22...

Page 49: ...4INTRLCK P5INTRLCK 38 38 38 38 29 10 12 12 10 10 10 30 13 10 10 13 10 19 10 29 12 10 31 10 14 14 10 10 10 32 15 10 10 15 30 10 13 13 10 10 10 31 14 10 14 10 38 38 10 19 10 P1MRLN MAX7311AUG 38 38 38 3...

Page 50: ...0 10 35 38 38 35 10 18 18 10 10 38 38 38 38 10 33 16 10 10 16 15 10 15 32 10 10 P13APN P13PDN P13MRLN P13INTRLCK P15MRLN P15INTRLCK P14INTRLCK P14MRLN P15PEP P15PIN P15AIN P13PEP P13PIN P13AIN P13PFN...

Page 51: ...P4PIN P5AIN P5PIN P6AIN P6PIN P7AIN P8AIN P8PIN P9AIN P9PIN P10AIN P10PIN P11AIN P11PIN P12AIN P12PIN P13AIN P13PIN P14AIN P14PIN P15AIN P15PIN YEL GRN GRN GRN GRN GRN GRN GRN GRN GRN GRN GRN GRN GRN...

Page 52: ...IVEN P6_ACTIVEN P5_ACTIVEN P4_ACTIVEN P3_ACTIVEN P2_ACTIVEN P1_ACTIVEN P0_ACTIVEN P3_LINKUPN MAX7311AUG IO EXPANDER LINK STATUS P10_LINKUPN P12_LINKUPN P13_LINKUPN 7 18 7 17 7 17 7 16 6 16 6 15 6 15 6...

Page 53: ...5 10K 5 10K 0 0 0 0 0 0 NA NA 5 5 5 10K 5 5 330 5 330 2 0 02 2 0 012 2 0 012 2 0 02 1 110K 5 15 5 15 5 15 5 15 DNP DNP 10K 10K 10K HOT PLUG CONTROL PORT 2 3 P2PEP P3PEP 0 022UF 0 1UF 0 1UF 0 1UF 0 1UF...

Page 54: ...WRGDN P4_PWRGDN 5 10K 5 10K 5 10K 5 10K 2 0 012 2 0 012 2 0 02 2 5 330 5 330 5 15 5 15 5 15 5 15 0 1UF 5 5 5 5 5 10K 5 10K 0 0 0 0 0 0 NA NA DNP DNP 10K 10K 10K 10K 0 022UF 6800PF 0 1UF GRN GRN 0 1UF...

Page 55: ...8 GRN GRN 0 022UF 6800PF P67_INTN 8 8 P7PEP P6PEP HOT PLUG CONTROL PORT 6 7 0 022UF 6800PF 0 1UF 0 022UF 0 1UF 10K 10K 10K 10K 10K 10K 10K 10K 110K 1 DNP DNP 330 5 330 5 15 5 15 5 15 5 15 5 0 012 2 0...

Page 56: ...10K 5 10K 5 0 0 0 0 0 0 5 5 5 5 2 0 012 2 2 0 02 5 330 5 330 5 15 5 15 5 15 5 15 1 10K 10K 10K 10K 10K 0 1UF 0 1UF HOT PLUG CONTROL PORT 8 9 0 1UF GRN GRN 6800PF 0 1UF 0 022UF 0 1UF P8PEP P9PEP 8 9 9...

Page 57: ...330 5 330 5 15 5 15 5 15 5 15 DNP 1 10K 10K 10K 10K 10K 10K 10K 10K P11PFN P10PFN P11_PWRGDN P10_PWRGDN 11 6 11 7 9 0 022UF 0 022UF 0 1UF 0 1UF RED 9 9 9 P11PEP P10PEP HOT PLUG CONTROL PORT10 11 6800P...

Page 58: ...2 0 012 2 0 012 2 0 02 2 0 02 5 330 5 330 5 15 5 15 5 15 1 110K DNP DNP 10K 10K 10K 10K 10K 10K 10K 10K 0 022UF P13PFN P12PFN P13_PWRGDN P12_PWRGDN 11 7 11 7 9 6800PF 0 1UF 6800PF 0 1UF 0 022UF 9 9 9...

Page 59: ...NA 5 5 5 10K 10K 5 5 330 5 330 2 0 012 2 0 012 0 02 2 0 02 5 15 5 15 5 15 5 15 DNP DNP 110K 10K 10K 10K 10K 10K 0 1UF GRN GRN 6800PF 0 1UF 0 022UF 0 1UF 0 1UF HOT PLUG CONTROL PORT14 15 P15PEP P14PEP...

Page 60: ...0K 5 330 2 0 012 2 0 02 5 15 5 15 DNP DNP 5 10K 5 10K 10K 10K 10K 0 022UF 0 1UF 0 01UF 0 01UF 0 022UF GRN 0 1UF HOT PLUG CONTROL PORT 1 P1PEP 6800PF 8 8 RED P1_INTN 5 11 P1_PWRGDN P1PFN TITLE DRAWING...

Page 61: ...PETP2 P0_PERN1 P0_PERP1 P0_PETN1 P0_PETP1 P0_PERN0 P0_PERP0 P0_PETN0 P0_PETP0 SO0_PERN7 SO0_PETP7 SO0_PETN6 SO0_PERN5 SO0_PETN5 SO0_PETP5 SO0_PERN4 SO0_PERP4 SO0_PETN4 SO0_PETP4 SO0_PERN3 SO0_PERN2 SO...

Page 62: ...0 P2_PETN0 P2_PETP0 SO1_PETN7 SO1_PETP7 SO1_PERN6 SO1_PERP6 SO1_PETN6 SO1_PETP6 SO1_PERN5 SO1_PERP5 SO1_PERN4 SO1_PERP4 SO1_PETN4 SO1_PETP4 SO1_PERN3 SO1_PERP3 SO1_PETN3 SO1_PERP2 SO1_PERN1 SO1_PERP1...

Page 63: ...2_PETP1 SO2_PETN1 SO2_PERP1 SO2_PETP2 SO2_PETN2 SO2_PERP2 SO2_PERN2 SO2_PERN3 SO2_PERN1 SO2_PERP4 SO2_PETP6 SO2_PETN6 SO2_PERP6 SO2_PERN4 SO2_PETN5 SO2_PERP5 SO2_PERN5 P4_PERN6 SO2_PERN6 P4_PETP7 P4_P...

Page 64: ...P4 SO3_PETN5 SO3_PERP5 SO3_PERN5 SO3_PETP6 SO3_PETN6 SO3_PERP6 SO3_PERN6 SO3_PETP7 SO3_PETN7 SO3_PERP7 SO3_PERN7 P6_PETP0 P6_PETN0 P6_PERP0 P6_PERN0 P6_PETP1 P6_PETN1 P6_PERP1 P6_PERN1 P6_PETP2 P6_PET...

Page 65: ...ETP0 SO4_PETN6 SO4_PETP6 SO4_PERN5 SO4_PERP5 SO4_PETN5 SO4_PETP5 SO4_PERN4 SO4_PERP4 SO4_PETN4 SO4_PETP4 SO4_PERN3 SO4_PERP3 SO4_PETN3 SO4_PETP3 SO4_PERN2 SO4_PERP2 SO4_PETN2 SO4_PERN1 SO4_PERP1 SO4_P...

Page 66: ...10_PERP0 P10_PETN0 P10_PETP0 SO5_PERP7 SO5_PETN7 SO5_PERN6 SO5_PERN5 SO5_PETN5 SO5_PETP5 SO5_PERN4 SO5_PERP4 SO5_PETN4 SO5_PERN3 SO5_PETN3 SO5_PETP3 SO5_PERN2 SO5_PERP2 SO5_PETN2 SO5_PETP2 SO5_PERN1 S...

Page 67: ...ERP1 SO6_PETP2 SO6_PERN1 SO6_PETN3 SO6_PETN2 SO6_PERP2 SO6_PERN2 SO6_PETP3 SO6_PERP3 SO6_PETP4 SO6_PETN4 SO6_PERN3 SO6_PERP4 SO6_PERN4 SO6_PETP6 SO6_PETP5 SO6_PETN5 SO6_PERP5 SO6_PERN5 SO6_PETN6 SO6_P...

Page 68: ...SO7_PERN7 SO7_PERP7 SO7_PETN7 SO7_PETP7 SO7_PERN6 SO7_PERP6 SO7_PETN6 SO7_PETP6 SO7_PERN5 SO7_PERP5 SO7_PETN5 SO7_PETP5 SO7_PERN4 SO7_PERP4 SO7_PETN4 SO7_PETP4 SO7_PERN3 SO7_PERP3 SO7_PETN3 SO7_PETP3...

Page 69: ...20 16V 10UF P1_CONN_3_3V P1_CONN_12V 0 S_PERSTN 20 20 5 5 0 0 87715 9206 P0_WAKE 5 1K 5 PCI EXPRESS CONN PORT 0 1 20 P0_PERP1 P0_PERN1 P0_PERP2 P0_PERN2 P0_PETP0 P0_PETN0 P0_PETP1 P0_PETN1 P0_PETP2 P0...

Page 70: ...1 21 21 21 21 21 21 21 35 34 33 32 31 30 29 28 38 35 34 33 32 31 30 29 28 38 21 21 21 21 21 21 37 21 5 21 21 21 21 21 21 8 8 34 33 32 31 30 29 28 3 5 5 21 21 21 21 21 21 21 21 21 21 21 21 34 33 32 31...

Page 71: ...2 22 22 22 22 5 5 22 22 22 22 22 22 22 22 22 22 22 22 8 22 22 22 22 22 22 22 22 5 5 22 22 22 22 22 22 22 22 37 8 28 29 31 32 33 34 28 29 31 32 35 3 28 29 30 31 32 33 34 3 28 29 30 31 32 33 34 P5_CONN_...

Page 72: ...23 23 23 23 23 23 23 23 23 23 23 23 37 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 6 6 35 35 8 38 28 29 30 31 32 33 34 38 28 29 30 31 32 33 34 23 23 23 37 23 23 23 6 6 23 23 23 23 23 3 28 29 30 31...

Page 73: ...24 24 24 24 24 24 24 24 24 24 24 24 6 6 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 37 38 28 29 30 31 32 33 38 28 29 30 31 32 33 3 28 29 30 31 32 33 34 3 28 29 30 31 32 33 34 8 9 6 6 24 24 24 24...

Page 74: ...3_3V P10_PERST P10PDN P11_PETP1 P11_PERST P11PDN 35 34 33 32 31 30 29 28 38 35 34 33 32 31 30 29 28 38 34 33 32 31 30 29 28 3 34 33 32 31 30 29 28 3 9 37 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 2...

Page 75: ...RSTN P13_PERSTN S_PERSTN 26 26 37 26 26 26 26 26 26 26 26 26 26 26 26 26 26 9 7 7 26 26 26 26 26 26 26 26 26 26 26 26 26 26 38 28 30 31 32 33 34 35 38 28 29 30 31 32 33 34 35 37 26 26 26 26 26 26 26 2...

Page 76: ...7 27 27 27 27 27 27 27 7 7 27 27 27 27 27 27 27 27 37 9 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 7 7 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 37 9 3 28 29 30 31 32 33 34 3 28 29 30 31 32...

Page 77: ...21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10 VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 16 of 16 VDDAPE16 VDDAPE15 VDDAPE14 VDDAPE13 VDDAPE12 VDDAPE11 VDDAPE10 VDDAPE9 VDDAPE...

Page 78: ...1UF 0 1UF VDDAPE P11_WAKE P13_WAKE P14_WAKE P15_WAKE P6_WAKE P7_WAKE P9_WAKE P10_WAKE P5_WAKE P4_WAKE POWER DECOUPLING AND WAKE VTT VDDCORE VDDIO P12_WAKE 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1...

Page 79: ...10K 5 10K 5 10K 5 10K 5 10K 5 10K 5 10K 5 10K 5 10K 5 5 5 5 5 330 330 5 5 5 330 6 5 GRN GRN GRN GRN 35 35 34 34 33 33 31 31 30 30 29 28 11 9 9 9 8 8 8 8 5 330 GRN 9 8 38 9 8 38 32 32 7 7 11 11 29 P15...

Page 80: ...Change Originator Add connection to U31 AM3 from R589 Remove resistors R18 R30 R20 and R32 APPROVED STG Approval Signatures APPROVED Power rails to U31 have excessive voltage drop through 0 ohm resis...

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