IDT 89EBPES48H12, Manual

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IDT Installation of the EB64H16 Eval Board
EB64H16 Eval Board Manual 2 - 4 January 16, 2007
Notes
The source for the onboard clock is the ICS59FG104 clock generator device (U14) connected to a
25MHz oscillator (Y1). When using the onboard clock generator, the EB64H16 allows selection between
multiple clock rates and spread spectrum settings via DIP switches as described in Tables 2.2 and 2.3
respectively. Spread Spectrum technology reduces peak EMI emissions by modulating the frequency to
spread the peak energy over a wider bandwidth.
If the Clock Spread Spectrum is used to modulate data rate, then both ports must use same modulated
clock source. Therefore, if your system uses SSC, the on-board clock generator must be disabled and the
upstream reference clock must be used instead.
The output of the two onboard clock generator is accessible through four SMA connectors located on
the Evaluation Board. See Table 2.4. This can be used to connect a scope for probing or capturing
purposes and cannot be used to drive the clock from an external source.
Figure 2.3 illustrates the clock distribution block diagram for the EB64H16 evaluation board.
Clock Frequency Switch - S2[4:2]
S2[4] S2[3] S2[2] Clock Frequency
ON ON ON 100 MHz (Default)
ON ON OFF 125 MHz
ON ON ON <Reserved>
OFF OFF OFF <Reserved>
Table 2.2 Clock Frequency Selection
Clock Spread Spectrum Switch - S2[1]
S2[1] Spread
OFF No Spread (Default)
ON Spread Enable
Table 2.3 Clock Spread Spectrum Selection
Onboard Reference Clock Output (Differential) – J1, J3, J15, J8
J1, J15 Positive Reference Clock
J3, J8 Negative Reference Clock
Table 2.4 SMA Connectors - Onboard Reference Clock