IDT 89EBPES48H12, Manual

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IDT Installation of the EB64H16 Eval Board
EB64H16 Eval Board Manual 2 - 2 January 16, 2007
Notes
Hardware Description
The PES64H16 is a 64-lane, 16-port PCI Express® switch. It is a peripheral chip that performs PCI
Express based switching with a feature set optimized for high performance applications such as servers
and storage. It provides fan-out and switching functions between a PCI Express upstream port and 15
downstream ports or peer-to-peer switching between downstream ports.
The EB64H16 has 15 PCI Express downstream ports, accessible through fifteen x16 connectors. Seven
specific ports are capable of negotiating a x1, x2, x4, or x8 link width and all fifteen ports are capable of
negotiating a x1, x2, x4 link width. All endpoint cards connected to the PES64H16 must support at least one
of these link widths. A personality module can be used to provide a single x8 downstream port by merging
two specific x4 ports (see section PCI Express Personality Module on page 2-23).
Basic requirements for the board to run are:
– Host system with a PCI Express root complex supporting x8 configuration through a PCI Express
x8 slot. (If your host system does not offer a x8 slot, please contact ssdhelp@idt.com for alterna-
tive solutions.)
– x1, x2, x4, or x8 PCI Express Endpoint Cards.
Host System
The evaluation board cannot be operated as a standalone unit. A host system implementing a PCI
Express root complex supporting x8 configuration through a PCI Express x8 slot is required to take full
advantage of the PES64H16’s capabilities. One such system is the SuperMicro X6DH8-G2 motherboard
equipped with an Intel E7520 chipset which was introduced in 2004 to deploy dual-processor server chipset
technology. The board has three PCI Express slots. All slots have x8 connectors, but only two are electron-
ically connected for a x8 link width (J15 and J16). The remaining slots are electronically connected for a x4
link width configuration. Care must be taken to avoid using the EB64H16 in the x4 slot (J17). Figure 2.2
shows the proper connectors.