background image

P2 PWR

P2 PGOOD

P2 LINK

P2 ACT

P2 ATTN

Fri Jun 15 14:47:57 2007

SHEET 9 OF 13

1.0

18-634-000

B.OH

2007

K. LEUNG

STGSCH-00114

89EBPES16T4G2

B

R157

DS22

DS17

DS18

R152

R153

DS21

R155

R154

R156

DS20

DS19

R148

R149
R150

R151

C58

C59

W19

C60

C61

B9

B82

B81

B80

B8

B79

B78

B77

B76

B75

B74

B73

B72

B71

B70

B7

B69

B68

B67

B66

B65

B64

B63

B62

B61

B60

B6

B59

B58

B57

B56

B55

B54

B53

B52

B51

B50

B5

B49

B48

B47

B46

B45

B44

B43

B42

B41

B40

B4

B39

B38

B37

B36

B35

B34

B33

B32

B31

B30

B3

B29

B28

B27

B26

B25

B24

B23

B22

B21

B20

B2

B19

B18

B17

B16

B15

B14

B13

B12

B11

B10

B1

A9

A82

A81

A80

A8

A79

A78

A77

A76

A75

A74

A73

A72

A71

A70

A7

A69

A68

A67

A66

A65

A64

A63

A62

A61

A60

A6

A59

A58

A57

A56

A55

A54

A53

A52

A51

A50

A5

A49

A48

A47

A46

A45

A44

A43

A42

A41

A40

A4

A39

A38

A37

A36

A35

A34

A33

A32

A31

A30

A3

A29

A28

A27

A26

A25

A24

A23

A22

A21

A20

A2

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10

A1

J4

5

5

12

12

4

4

9

12
12

12

12

12

12

5

12

12

12

12
12

12

12
12

12

8

12

4

10

11

2

10

11

12

5

5

5

6

4

5

9

8

12

4

10

11

25V

P2_LINKUPN

P2_ACTIVEN

P2_PERP1

P2_PERN3

P2_REFCLKN

P2_REFCLKP

P2_PERST_N

P2_PERP0
P2_PERN0

P2_PERN1

P2_PERN2

P2_PERP2

P2_PERP3

P2_WAKE_N

P2_PETP2

P2_PETN1

P2_PETP1

P2_PETP0
P2_PETN0

P2_PETN2

P2_PETP3
P2_PETN3

P2_PCIE_3_3AUX

PORT 2 CONNECTOR

0%

0

GRN

GRN

5%

330

330

5%

GRN

5%

330

5%

330

GRN

YEL

5%

5.1K

10UF

10UF

25V

10UF

25V

10UF

25V

DNP

DNP

P2_12V

P2_3_3V

P2_12V

P2_3_3V

5%

330

GRN

M_P2_PERST_N

330

M_SSMBDATA

M_PERSTN

P2_PDN

5%

P2_AIN

P2_PIN

P2_PWRGDN

P2_PERST_N

M_SSMBCLK

TITLE

DRAWING NO.

AUTHOR

CHECKED BY

COPYRIGHT (C) IDT

3

SIZE

REV.

FAB P/N

1

1

A

A

B

B

C

C

D

D

2

2

4

4

5

6

6

7

7

8

3

8

5

6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138

CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

OUT

OUT

IN

IN

OUT

PCI_X16_CONN

PETP12

GND

GND

PERN15

PERP15

GND

GND

PERN14

PERP14

GND

GND

PERN13

PERP13

GND

GND

PERN12

PERP12

GND

GND

PERN11

PERP11

GND

GND

PERN10

PERP10

GND

GND

PERN9

PERP9

GND

GND

PERN8

PERT8

GND

RSVD

RSVD

PRSTN2#

GND

PETN15

PETP15

GND

GND

PETN14

PETP14

GND

GND

PETN13

PETP13

GND

GND

PETN12

GND

PETN11

PETP11

GND

GND

PETN10

PETP10

GND

GND

PETN9

PETP9

GND

GND

PETN8

PETP8

GND

GND

GND

PERN3

RSVD
RSVD

GND

PERN4

PERP4

GND
GND

PERP5

GND

PERN5

GND

PERP6
PERN6

GND
GND

PERP7
PERN7

GND
PETP4

PRSTN2#

PETN4

RSVD

GND

PETP5

GND

GND

PETN5

GND

GND

GND

PETN6

PETP6

PRSTN2#

PETN7
GND

PETP7

REFCLK-

PRSTN1#

+12V
+12V

GND

JTAG2
JTAG3
JTAG4
JTAG5
+3.3V

PERST#

+3.3V

GND

GND

PERP0

GND

PERN0

PERP1

GND

RSVD

GND

PERN1

GND

PERN2

PERP2

GND
GND

PERP3

GND

+12V

+12V

RSVD

SMCLK
SMDAT

+3.3V

GND

3.3VAUX

JTAG1

WAKE#

RSVD

GND

PETP2

PETN1

PETP1

PRSTN2#
GND

GND

PETP0
PETN0

PETN2

GND

PETP3
PETN3

GND

GND

GND
GND

IN

IN

IN

3_3V

IN

IN

OUT

3_3V

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

OUT

OUT

Summary of Contents for 89EBPES16T4G2

Page 1: ...lver Creek Valley Road San Jose California 95138 Telephone 800 345 7015 408 284 8200 FAX 408 284 2775 Printed in U S A 2007 Integrated Device Technology Inc IDT 89EBPES16T4G2 Evaluation Board Manual E...

Page 2: ...ure Analysis be performed LIFE SUPPORT POLICY Integrated Device Technology s products are not authorized for use as critical components in life support devices or systems unless a specific written agr...

Page 3: ...Express Analog Power Voltage Converter 2 3 PCI Express Transmitter Analog Power Voltage Converter 2 3 Core Logic Voltage Converter 2 3 3 3V I O Voltage Regulator 2 3 Power up Sequence 2 3 Required Jum...

Page 4: ...IDT Table of Contents EB16T4G2 Eval Board Manual ii October 3 2007 Notes...

Page 5: ...6 Downstream Reset Selection 2 4 Table 2 7 Boot Configuration Vector Signals 2 4 Table 2 8 Boot Configuration Vector Switches S7 S8 ON 0 OFF 1 2 5 Table 2 9 Slave SMBus Interface Connector 2 6 Table...

Page 6: ...IDT List of Tables EB16T4G2 Eval Board Manual iv October 3 2007 Notes...

Page 7: ...Notes EB16T4G2 Eval Board Manual v October 3 2007 List of Figures Figure 1 1 Function Block Diagram of the EB16T4G2 Eval Board 1 1...

Page 8: ...IDT List of Figures EB16T4G2 Eval Board Manual vi October 3 2007 Notes...

Page 9: ...ts The EB16T4G2 eval board is designed to function as an add on card to be plugged into a x4 PCIe slot available on a motherboard hosting an appropriate root complex microprocessor s and three downstr...

Page 10: ...ed to the Serial EEPROMs through I O expander Attention button for each downstream port to initiate a hot swap event on each port Four pin connector for optional external power supply Push button for...

Page 11: ...4G2 has three PCI Express downstream ports accessible through three x16 connectors All three ports are capable of negotiating a x1 x2 or x4 link width All endpoint cards connected to the PES16T4G2 mus...

Page 12: ...n support an external source is required to supply this extra power via an auxiliary 4 pin power connector on the board Header W1 W2 and W3 see Table 2 14 are used to select proper power source for th...

Page 13: ...power supply ramp up VDDCORE must remain at least 1 0V below VDDIO at all times There are no other power up sequence requirements for the various operating supply voltages Required Jumpers To deliver...

Page 14: ...eset while PERSTN is active The boot configuration vector defines the essential parameters for switch operation and is set using DIP switches S7 and S8 as defined in Table 2 8 Port Jumper Selection 2...

Page 15: ...itch operating mode Default 0x0 0x0 Normal switch mode 0x1 Normal switch mode with Serial EEPROM based initialization 0x2 through 0x7 Reserved REFCLKM PCI Express Reference Clock Mode Select This sign...

Page 16: ...signals SMBus Slave Interface On the PES16T4G2 board the slave SMBus interface is accessible through the PCI Express edge connector as well as a 4 pin header as described in Table 2 9 Note The SMBus...

Page 17: ...provides a JTAG connector J5 for access to the PES16T4G2 JTAG interface The connector is a 2 54 x 2 54 mm pitch male 10 pin connector Refer to Table 2 15 for the JTAG Connector J5 pin out Attention Bu...

Page 18: ...om Upstream port Default 1 2 Port 2 12V source from hot plug controller W9 Header 2 3 Shunted 2 3 Port 4 12V source from Upstream port Default 1 2 Port 4 12V source from hot plug controller W12 Header...

Page 19: ...Port 6 Power Indicator DS19 Yellow Port 2 Attention Indicator DS7 Yellow Port 4 Attention Indicator DS13 Yellow Port 6 Attention Indicator DS18 Green Port2 Activity Indicator DS6 Green Port4 Activity...

Page 20: ...REFCLK REFCLK Reference clock 14 PETp0 Transmitter differential REFCLK differential pair 15 PETn0 pair Lane 0 GND Ground 16 GND Ground PERp0 Receiver differential 17 PRSNT2 Hot Plug presence detect PE...

Page 21: ...nd 50 PETp8 Transmitter differential RSVD Reserved 51 PETn8 pair Lane 8 GND Ground 52 GND Ground PERp8 Receiver differential 53 GND Ground PERn8 pair Lane 8 54 PETp9 Transmitter differential GND Groun...

Page 22: ...ogether This allows the board to be installed in a x1 or a x4 slot via a slot reducer 71 PETn13 pair Lane 13 GND Ground 72 GND Ground PERp13 Receiver differential 73 GND Ground PERn13 pair Lane 13 74...

Page 23: ...IDT Installation of the EB16T4G2 Eval Board EB16T4G2 Eval Board Manual 2 13 October 3 2007 EB16T4G2 Board Figure...

Page 24: ...IDT Installation of the EB16T4G2 Eval Board EB16T4G2 Eval Board Manual 2 14 October 3 2007 Notes...

Page 25: ...te a configuration file into an EEPROM programmable data structure This enables the user to program an appropriate serial EEPROM with desirable register settings for the PES16T4G2 and then to populate...

Page 26: ...IDT Software for the EB16T4G2 Eval Board EB16T4G2 Eval Board Manual 3 2 October 3 2007 Notes...

Page 27: ...Notes EB16T4G2 Eval Board Manual 4 1 October 3 2007 Chapter 4 Schematics Schematics...

Page 28: ...R 1 TITLE PAGE SHEET DESCRIPTION Tue Oct 02 16 57 16 2007 SHEET 1 OF 13 K LEUNG 2007 STGSCH 00114 B OH 1 0 18 634 000 89EBPES16T4G2 B STGC 0114R01 1 0 INITIAL RELEASE 2007 10 02 K LEUNG 6 A TITLE CHEC...

Page 29: ...1UF YEL YEL 330 PERST_N 330 GRN RED 5 47UF 12V_DS 5 10K 10K 5 5 10K RED 0 0 10V 220UF 47UF 10V 1 21K 1 22UF 25V 22UF 25V 25V 10UF 25V 10UF 22UF 25V 10V WHT WHT WHT WHT 5 12 11 10 9 2 8 2 8 TITLE DRAWI...

Page 30: ...10UF 10UF 10UF 10UF 10UF 400MA 400MA 400MA 1UF 120OHM 120OHM 120OHM 16V 1UF 0 0 015UF 0 16V 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 1UF 0 1UF 400MA 120OHM 120OHM 400MA 16V 120OHM 1 16V 1UF 0 1UF 1UF...

Page 31: ...3 2 1 6 9 7 13 11 15 14 10 U4 R14 R19 9 8 10 7 11 6 12 5 13 4 14 3 15 2 16 1 S2 4 3 1 2 Y1 C16 8 12 9 10 11 8 12 9 10 11 6 5 9 6 5 11 6 5 10 12 12 10 10 8 8 M_SSMBCLK M_SSMBDATA P2_PWRGDN P6_PWRGDN P...

Page 32: ...M_SDA P0_LINKUPN P4_APN 0 0 0 P4_PDN IO EXP WAKE ATTN BUTTONS M_IOINTN0 0 YEL P2_MRLN YEL P2_ILOCKP YEL YEL P6_MRLN P6_ILOCKP P4_PFN P4_PEP P4_PIN P4_AIN P4_APN P6_WAKE_N YEL P4_ILOCKP YEL P4_MRLN 10...

Page 33: ...LUG CONTROLLERS P6_12VSENSE P6_12VGATE P6_12VOUT P4_12VGATE P6_3VSENSE P6_3VGATE P6_3VOUT P6_VAUX P2_VAUX P4_12VSENSE P4_VAUX P2_3VSENSE P24_INTN P6_INTN P4_PEP P2_PEP 10K 10K 10K 10K 10K 10K 110K 0 1...

Page 34: ...12V P6_3_3V 12V_DS P2_PCIE_3_3AUX P2_12V P2_3_3V P4_PCIE_3_3AUX P4_12V P4_3_3V P4_3VSENSE P4_3VGATE P6_12VGATE P6_12VOUT P6_3VOUT P2_3VOUT P2_3VGATE P2_3VSENSE P2_12VOUT P2_12VGATE P2_12VSENSE P4_3VOU...

Page 35: ..._PETN3 PORT 0 UPSTREAM EDGE CONN P0_REFCLKP P0_PERP0 PERST_N P0_ACTIVEN P0_PERP1 P0_PERP3 P0_PERP2 1K 1K P0_PERN0 M_SSMBCLK P0_LINKUPN DNP 5 330 10UF 25V 10UF 25V 10UF 25V GRN GRN 330 5 M_SSMBDATA TIT...

Page 36: ...OR 0 0 GRN GRN 5 330 330 5 GRN 5 330 5 330 GRN YEL 5 5 1K 10UF 10UF 25V 10UF 25V 10UF 25V DNP DNP P2_12V P2_3_3V P2_12V P2_3_3V 5 330 GRN M_P2_PERST_N 330 M_SSMBDATA M_PERSTN P2_PDN 5 P2_AIN P2_PIN P2...

Page 37: ...0UF 25V 10UF 25V P4_12V P4_3_3V P4_PCIE_3_3AUX P4_3_3V DNP DNP GRN 330 5 P4_ACTIVEN P4_AIN GRN P4_PERST_N M_P4_PERST_N PORT 4 CONNECTOR P4_PWRGDN P4_PIN P4_LINKUPN 330 M_PERSTN P4_PDN 0 0 M_SSMBDATA M...

Page 38: ...N P6_LINKUPN P6_ACTIVEN M_SSMBDATA M_PERSTN P6_PERST_N M_P6_PERST_N P6_PDN P6_PIN P6_AIN P6_PETN3 P6_PETP3 P6_PETN2 P6_PETN0 P6_PETP1 P6_PETN1 P6_PETP2 P6_WAKE_N P6_PERP3 P6_PERN2 P6_PERN0 P6_PERP0 P6...

Page 39: ...5 52 298 000 P0_PETP1 P0_PETN0 P0_PETP0 M_P6_PERST_N M_SDA M_SCL JTAG_RST_N M_P2_PERST_N M_P4_PERST_N M_IOINTN0 M_IOINTN2 YEL YEL M_GPEN 12 5 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 5 11 10 9 4 8...

Page 40: ...F 0 1UF 10V 47UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1...

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