Notes
EB16T4G2 Eval Board Manual
2 - 1
October 3, 2007
®
Chapter 2
Installation of the EB16T4G2
Eval Board
EB16T4G2 Installation
This chapter discusses the steps required to configure and install the EB16T4G2 evaluation board. All
available DIP switches and jumper configurations are explained in detail.
The primary installation steps are:
1. Configure jumper/switch options suitable for the evaluation or application requirements.
2. Connect PCI Express endpoint cards to the downstream port PCIe slots on the evaluation board.
3. Insert the evaluation board into the host system (motherboard with root complex chipset).
4. Apply power to the host system.
The EB16T4G2 board is shipped with all jumpers and switches configured to their default settings. In
most cases, the board does not require further modification or setup.
Hardware Description
The PES16T4G2 is a 16-lane, 4-port PCI Express® switch. It is a peripheral chip that performs PCI
Express based switching with a feature set optimized for high performance applications such as servers
and storage. It provides fan-out and switching functions between a PCI Express upstream port and 3 down-
stream ports or peer-to-peer switching between downstream ports.
The EB16T4G2 has three PCI Express downstream ports, accessible through three x16 connectors. All
three ports are capable of negotiating a x1, x2, or x4 link width. All endpoint cards connected to the
PES16T4G2 must support at least one of these link widths.
Basic requirements for the board to run are:
–
Host system with a PCI Express root complex supporting x4 configuration through a PCI Express
x4 slot.
–
x1, x2, or x4 PCI Express Endpoint Cards.
Reference Clocks
The PES16T4G2 requires a differential reference clock. The EB16T4G2 derives this clocks from a
common source which is user-selectable. The common source can be either the host system’s reference
clock or the onboard clock generator. Selection is made by stuffing resistors described in Table 2.1.
The source for the onboard clock is the ICS557-03 clock generator device (U8) connected to a 25MHz
oscillator (Y1). When using the onboard clock generator, the EB16T4G2 allows selection between multiple
clock rates and spread spectrum settings via DIP switches as described in Tables 2.2 and 2.3 respectively.
Spread Spectrum technology reduces peak EMI emissions by modulating the frequency to spread the peak
energy over a wider bandwidth.
Clock Configuration Stuffing Option
W6 and W7
Clock Source
Pins 2 and 3 Onboard Reference Clock – Use onboard clock generator
Pins 1 and 2 Upstream Reference Clock – Host system provides clock
(Default)
Table 2.1 Clock Source Selection
Summary of Contents for 89EBPES16T4G2
Page 4: ...IDT Table of Contents EB16T4G2 Eval Board Manual ii October 3 2007 Notes...
Page 6: ...IDT List of Tables EB16T4G2 Eval Board Manual iv October 3 2007 Notes...
Page 8: ...IDT List of Figures EB16T4G2 Eval Board Manual vi October 3 2007 Notes...
Page 26: ...IDT Software for the EB16T4G2 Eval Board EB16T4G2 Eval Board Manual 3 2 October 3 2007 Notes...
Page 27: ...Notes EB16T4G2 Eval Board Manual 4 1 October 3 2007 Chapter 4 Schematics Schematics...