High-speed Multifunction Boards
User Manual, Ver. 1.0, May 2015, PMH-029-10 Page 14
2.4
Analog Input
2.4.1
Analog Input Block
The following is the block diagram for the A/D system:
AI0
AIx
CON1
Post-Trigger
Memory
FIFO
Internal Clock
Software Clock
Software Trigger
Polling
Interrupt
DMA
PGA
ADC
AI_CONV
DTRG0
External Clock
...
Input range selection
Sampling
Hold
On PCIe-8620/8622, each channel uses its own instrumentation amplifier and A/D converter to
achieve simultaneous data acquisition. The main blocks featured in the PCIe-8620/8622 Analog
Input block are as follows:
CON1
:
User can connect Analog Input signals to the PCIe-8620/8622 through the CON1.
ADC
:
The analog-to-digital converter (ADC) digitizes the AI signal by converting the analog voltage
into a digital number.
FIFO:
PCIe-862x Series can perform A/D conversion of a fixed or infinite number of samples. A large
first-in-first out (FIFO) buffer holds data during AI acquisitions to ensure that no data is lost.
PCIe-862x can handle A/D conversion operations with DMA or programmed I/O.
