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COM Express® Carrier Board Design Guide
2.4.2 Reference Schematics
Figure 10: Magnetics Integrated Into RJ-45 Receptacle
2.4.3 Routing Considerations
The 8-wire PHY / MDI circuit is required to meet a specific waveform template and associated
signal integrity requirements defined in the IEEE 802.3-2005 specification. Routing rules should be
observed on the Carrier Board.
The four status signals driven by the COM Express Module to the Carrier Board are low frequency
signals that do not have any signal integrity or trace routing requirements beyond the accepted
design practices.
Summary of Contents for ET976
Page 1: ...COM EXPRESS CARRIER BOARD DESIGN GUIDE Version 1 0 January 2022...
Page 11: ...COM Express Carrier Board Design Guide 5 Figure 3 PCI Express x4 Slot Example...
Page 12: ...6 COM Express Carrier Board Design Guide Figure 4 PCIe Mini Card Reference Circuitry...
Page 19: ...COM Express Carrier Board Design Guide 13 Figure 7 HDMI Example 1...
Page 20: ...14 COM Express Carrier Board Design Guide Figure 7 HDMI Example 2...
Page 21: ...COM Express Carrier Board Design Guide 15 Figure 8 DVI Example 1...
Page 22: ...16 COM Express Carrier Board Design Guide Figure 8 DVI Example 2...
Page 31: ...COM Express Carrier Board Design Guide 25 Figure 12 USB 3 0 Example 2...
Page 37: ...COM Express Carrier Board Design Guide 31 Figure 14 LVDS Reference Schematic 2...
Page 44: ...38 COM Express Carrier Board Design Guide Figure 16 VGA Reference Schematics 2...
Page 48: ...42 COM Express Carrier Board Design Guide Figure 18 HDA Example Schematic 2...
Page 52: ...46 COM Express Carrier Board Design Guide Figure 19 LPC Super I O Example 2...
Page 61: ...COM Express Carrier Board Design Guide 55 Figure 24 General Purpose Serial Port Example 2...
Page 70: ...64 COM Express Carrier Board Design Guide Figure 28 PWRBTN and SYS_RESET Circuitry...
Page 84: ...78 COM Express Carrier Board Design Guide Chapter 4 Carrier Board PCB Layout Guidelines...
