I-Bus IBC2602, User Manual

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Chapter 2 - Configuration and Installation
2-5
IBC2602 User's Guide
Parallel I/O
The IBC2602 includes parallel I/O bits coming from the 82371EB PIIX4E
South Bridge for controlling and monitoring various functions. Access
these bits at I/O location x1030h through x1032h for the inputs and
x1035h through x1037h for the outputs. Table 2–5 details the operation
for each bit. See the Intel 82371EB data sheet for more information on
programming these registers. Do not re–program RESERVED bits.
Port Bit Description
1030h
(Inputs)
0-1
2
3
4
5-7
Reserved
General Purpose Push Button - 0 = IN, 1 = OUT
Power Supply FAIL (cPCI J2-C15)
Power Supply DEG (cPCI J2-C16)
Reserved
1031h
(Inputs)
0
1
2
3
4
5-7
LM87 THERM# Status Signal
Fan 1 Failure Status (J4-E1)
Reserved
LM87 ALERT# Status Signal
Fan 0 Failure Status (J4-D1)
Reserved
1032h
(Inputs)
0
1
2
3
4
5-7
GA0 ć Geographic Addressing bit 0 (J2-E22)
GA1 ć Geographic Addressing bit 1 (J2-D22)
GA2 ć Geographic Addressing bit 2 (J2-C22)
GA3 ć Geographic Addressing bit 3 (J2-B22)
GA4 ć Geographic Addressing bit 4 (J2-A22)
Reserved
1035h
(Outputs)
0-2
3
4-7
Reserved
Watchdog Enable - 1 = ON (Armed), 0 = OFF *
Reserved
1036h
(Outputs)
0-5
6
7
Reserved
CPU Fan Control (J14) - 0 = OFF, 1 = ON *
Reserved
1037h
(Outputs)
0-5
6
7
Reserved
User LED Status ć 0 = ON *, 1 = OFF
Reserved
*Default value after reset
Table 2-5: Board Specific I/O