I-Bus IBC2602, User Manual

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Chapter 1 - Introduction
1-4
IBC2602 User's Guide
BIOS Flash
The system BIOS is contained in a single 512 Kbyte Flash loaded into a
32-pin PLCC socket. The Flash write strobe includes a series zero-ohm
resistor that can permanently disable the write operation.
IDE and CompactFlash
The IBC2602 supports a primary and a secondary IDE drive, routed to a
mezzanine board connector and CompactFlash socket. The primary
interface includes mapping to the Mezzanine connector and the
CompactFlash socket. Additionally, both the primary and secondary
channels are available through the rear I/O (J4/J5). The default CMOS
setting configures the CompactFlash drive as a primary.
The mezzanine connector is a vertical mount 50–pin 2mm header
designed to support a mezzanine board that includes mounting
provisions for an optional 2.5” hard disk.
The CompactFlash socket is an industry standard Type I/Type II socket
that supports cards currently available with capacities up to 1Gbyte.
These Flash Cards or Micro Drives appear to the application programmer
as a standard IDE drive.
PMC Expansion
The PCI Mezzanine Card (PMC) defines the connector pin assignments
and mechanical dimensions for a mezzanine board based on a PCI
interface. The PMC architecture is compliant with IEEE

1386 for a
32–bit implementation. The electrical interface includes two Molex
71439–2164 (or equivalent) connectors.
AGP Video
The IBC2602 includes an Intel 69030 Advanced Graphics Port (AGP)
SVGA controller with 4Mbytes of video memory. The video controller
supports dual independent display output pipelines to drive two different
displays with either the same image or different images. The video
controller supports display resolutions up to 1600X1200X64K color in
single display mode and display resolutions up to 1280X1024X256 color
in dual display mode.
In addition to standard VGA monitors, the video controller supports a
wide range of flat panels. This includes TFT, DSTN, SSTN, EL, and
Plasma.