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Uc (430
‐
470 MHz)
Circuit Description
21
Working
Principle of PLL
The 19.2MHz frequency generated by the reference crystal oscillator goes to PLL for division,
generating the reference frequency (i.e. step frequency f1). Meanwhile, the frequency generated by
VCO goes into the PLL, where frequency f2 is generated through frequency division. Then frequencies
f1 and f2 are compared in the phase detector (PD), to generate continuous pulse current. The current
goes to the loop filter for RC integration, and is then converted to CV voltage. Then the CV voltage is
sent to the varactor of VCO.
The varactor
adjusts the output frequency of VCO directly until the CV voltage
becomes constant. Then PLL is locked, and the stable frequency output by VCO goes to the TX-RX channel
through two buffer amplifiers.
Working
Principle of VCO
VCO employs Colpitts oscillator circuit. There are two types of VCO: RX VCO and TX VCO. RX VCO
provides LO signal while TX VCO provides carrier for TX signal. When operating,
the oscillator
obtains different output frequencies by
c
hanging the varactor's control voltage (i.e. CV voltage) and then
uses the control signals VCC_VCO_L and VCC_VCO_H to switch operating status. VCO_L is used for
receiving while VCO_H is used for transmitting.
Two-point Modulation
In TX mode, the two-point modulation is employed, to obtain higher modulation accuracy and
lower 4FSK bit error rate. MOD_VCO and MOD_REF send the modulation signal to the modulation end
of VCO and the reference crystal oscillator of PLL respectively to modulate TX VCO and the reference
crystal oscillator.
RX_VCO
PLL Sky72310
Buffer
Amp
T/R_Switch
RF feedback LPF
TX_VCO
Mod_1
Loop Filter
VC_TXCO
Mod_2
PN:
≤
-80 (dBc/Hz)@1KHz
PN:
≤
-112 (dBc/Hz)@12.5KHz
PN:
≤
-120 (dBc/Hz)@25KHz
PN:
≤
-136 (dBc/Hz)@100KHz
PN:
≤
-145 (dBc/Hz)@1MHz
Two Point modulation
:
0.1
~
5KHz modulate
ripple
≤
±0.5dB
Fc=19.2MHz
To TX
To Mixer
2SC5108
Gain
≤
5dB
isolation
≥
20
dB
Current
≤
4
mA
2SC3356
Gain
≥
10dB
isolation
≥
15
dB
Current
≤
10
mA
3dB BW
≤
3.5K
Phase Margin:30-55°
A=0.1Vpp~2.0Vpp
S21=-3dB
Fpass=500MHz
Fstop=800MHz
Astop=40dB
Kv
≤
30MHz/V
CV=0.8
~2.3V
F=361.15
~401
.15MHz
PN
≤
-116dBc/[email protected]
Kv
≤
30MHz/V
CV=0.8
~2.3V
F=400
~440
MHz
PN
≤
-116dBc/[email protected]
3.0v for core&Vp
Compare frequence:4.8MHz
Prescaler Level
:
50~250mVpp
Pi Attenuator
isolation
=1
dB
FGU Close Loop:
Residual noise deviation
:
300
~
3KHz:
≤
50Hz
50Hz
~
15KHz:
≤
100Hz
Reverse Isolation
:>
40dB
(
Buffer to Amp
)
RF_OUT:
≥
0 dBm
(
to RX)
≥
-1 dBm
(
to TX)
Summary of Contents for PD362
Page 1: ...PORTABLE ...
Page 5: ...Ua 400 440 MHz ...
Page 16: ...Ua 400 440 MHz Exploded View and Packaging Guide 9 3 2 Packaging Guide ...
Page 43: ...9 PCB View Main Board_Top Layer 35 ...
Page 44: ...Main Board_Bottom Layer 36 ...
Page 73: ...Uc 430 470 MHz ...
Page 84: ...Uc 430 470 MHz Exploded View and Packaging Guide 9 3 2 Packaging Guide ...
Page 111: ...9 PCB View Main Board_Top Layer 35 ...
Page 112: ...Main Board_Bottom Layer 36 ...