GMS81C5108
28
JUNE 2001 Ver 1.0
The operation within data memory (RAM)
ASL, BIT, DEC, INC, LSR, ROL, ROR
Example; Addressing accesses the address 0135
H
regard-
less of G-flag and RPR.
981501
INC
!0115
H
;A
←
ROM[115
H
]
(5) Indexed Addressing
X indexed direct page (no offset)
→
→
→
→
{X}
In this mode, a address is specified by the X register.
ADC, AND, CMP, EOR, LDA, OR, SBC, STA, XMA
Example; X=15
H
, G=1, RPR=01
H
D4
LDA
{X}
;ACC
←
RAM[X].
X indexed direct page, auto increment
→
→
→
→
{X}+
In this mode, a address is specified within direct page by
the X register and the content of X is increased by 1.
LDA, STA
Example; G=0, X=35
H
DB
LDA
{X}+
X indexed direct page (8 bit offset)
→
→
→
→
dp+X
This address value is the second byte (Operand) of com-
mand plus the data of
-register. And it assigns the mem-
ory in Direct page.
ADC, AND, CMP, EOR, LDA, LDY, OR, SBC, STA
STY, XMA, ASL, DEC, INC, LSR, ROL, ROR
Example; G=0, X=0F5
H
C645
LDA
45
H
+X
98
0F100
H
~
~
~
~
data
115
H
➊
01
0F102
H
15
0F101
H
➋
data+1
→
data
➌
address: 0115
data
D4
115
H
0E550
H
data
→
A
➋
➊
~
~
~
~
data
DB
35
H
data
→
A
➋
➊
~
~
~
~
36H
→
X
data
45
3A
H
0E551
H
data
→
A
➋
➊
~
~
~
~
C6
0E550
H
45
H
+0F5
H
=13A
H
➌
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