HUAWEI MU709 Series HSPA+ LGA Module
Hardware Guide
Description of the Application Interfaces
Issue 09 (2017-12-15)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
15
Table 3-1
Definitions of pins on the LGA interface
Pin
No.
Pin Name
Pad
Type
Description
Parameter
Min.
(V)
Typ.
(V)
Max.
(V)
Comments
1
UART1_TX
O
UART1 transmit output
for debugging.
V
OH
1.35
1.8
2.1
-
V
OL
0
-
0.45
-
2
NC
-
Not connected
-
-
-
-
-
3
NC
-
Not connected
-
-
-
-
-
4
UART1_RX
I
UART1 receive data input
for debugging.
V
IH
1.26
1.8
2.1
-
V
IL
–0.3
-
0.63
-
5
PCM_SYNC
O
PCM sync
V
OH
1.35
1.8
2.1
The pin is output
when the
module is used
as PCM master;
input when the
module is used
as PCM slave.
V
OL
0
-
0.45
6
PCM_DIN
I
PCM data in
V
IH
1.26
1.8
2.1
-
V
IL
–0.3
-
0.63
7
PCM_DOUT
O
PCM data out
V
OH
1.35
1.8
2.1
-
V
OL
0
-
0.45
8
PCM_CLK
O
PCM clock
V
OH
1.35
1.8
2.1
The pin is output
when the
module is used
as PCM master;
input when the
module is used
as PCM slave.
V
OL
0
-
0.45
9
SD_DATA1
I/O
SD Card data signal.
Only used for debugging.
Please reserve this pin as
the test point.
V
OH
2.25
3.0
3.3
-
V
OL
0
-
0.75
V
IH
2.1
3.0
3.3
V
IL
–0.3
-
1.05
10
SD_DATA2
I/O
SD Card data signal.
Only used for debugging.
Please reserve this pin as
the test point.
V
OH
2.25
3.0
3.3
-
V
OL
0
-
0.75
V
IH
2.1
3.0
3.3
V
IL
–0.3
-
1.05
11
WAKEUP_I
N
I
Sleep authorization
signal.
H: Sleep mode is
V
IH
1.26
1.8
2.1
-
