Holtek HT66F488, Manual, Page: 91 / 195

Rev. 1.21 �� �ove��e� ��� 2�1� Rev. 1.21 �1 �ove��e� ��� 2�1�
HT66F488/HT66F489
A/D Flash MCU with EEPROM
HT66F488/HT66F489
A/D Flash MCU with EEPROM
PTM register description
Overall operation of the P-type TM is controlled using a series of registers. A read only register pair
exists to store the internal counter 10-bit value, while two read/write register pairs exist to store the
internal 10-bit CCRA/CCRP value. The remaining two registers are control registers which setup the
different operating and control modes.
Register
Name
Bit
7 6 5 4 3 2 1 0
PTMnC� PTnPAU PTnCK2 PTnCK1 PTnCK� PTnO� — — —
PTMnC1 PTnM1 PTnM� PTnIO1 PTnIO� PTnOC PTnPOL PTnCKS PTnCCLR
PTMnDL D� D6 D5 D4 D3 D2 D1 D�
PTMnDH — — — — — — D� D8
PTMnAL D� D6 D5 D4 D3 D2 D1 D�
PTMnAH — — — — — — D� D8
PTMnRPL D� D6 D5 D4 D3 D2 D1 D�
PTMnRPH — — — — — — D� D8
10-bit Periodic TM Register List (n=0, 1)
PTMnC0 Register
Bit 7 6 5 4 3 2 1 0
�a�e PTnPAU PTnCK2 PTnCK1 PTnCK� PTnO� — — —
R/W R/W R/W R/W R/W R/W — — —
POR � � � � � — — —
Bit 7 PTnPAU : PTMn Counter Pause Control
0: Run
1: Pause
The counter can be paused by setting this bit high. Clearing the bit to zero restores
normal counter operation. When in a Pause condition the TM will remain powered up
and continue to consume power. The counter will retain its residual value when this bit
changes from low to high and resume counting from this value when the bit changes
to a low value again.
Bit 6 ~4 PTnCK2 ~ PTnCK0 : Select PTMn Counter clock
000: f
SYS
/4
001: f
SYS
010: f
H
/16
011: f
H
/64
100: f
TBC
101: f
TBC
110: P TCKn rising edge clock
111: P TCKn falling edge clock
These three bits are used to select the clock source for the TM. The external pin clock
source can be chosen to be active on the rising or falling edge. The clock source f
SYS
is
the system clock, while f
H
and f
TBC
are other internal clocks, the details of which can
be found in the oscillator section.