hilscher 7763.200, Manual

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Accessories 40/72
Pinning host interface X1 of NXHX­PHY device
See position (3) in figure above.
Pin Signal Pin Signal
1 +3.3 V 35 ­
2 GND 36 MII_TXCLK
3 CLKOUT 37 MII_TXDEN
4 DPM_SIRQ# 38 MIITXD3
5 GND 39 MII_TXD2
6 RSTOUT# 40 MII_TXD1
7 ­ 41 MII_TXD0
8 ­ 42 MII_RXDV
9 ­ 43 MII_RXD3
10 ­ 44 MII_RXD2
11 DPM_DIRQ# 45 MII_RXD1
12 MII_RXCLK 46 MII_RXD0
13 GND 47 MII_CRS
14 MII_MDC 48 MII_COL
15 ­ 49 MII_TXER
16 MII_DIO 50 GND
17 ­ 51 ­
18 ­ 52 ­
19 MII_RXER 53 SPM_SIRQ#
20 GND 54 SPM_DIRQ#
21 ­ 55 SPM_CLK
22 ­ 56 SPM_CS#
23 ­ 57 SPM_MOSI
24 ­ 58 SPM_MISO
25 GND 59 ­
26 ­ 60 ­
27 ­ 61 ­
28 ­ 62 ­
29 ­ 63 ­
30 ­ 64 ­
31 ­ 65 ­
32 ­ 66 ­
33 GND 67 +3.3 V
34 ­ 68 ­
Table 42: Pinning host interface X1 of NXHX­PHY device
Pinning Serial Dual­Port Memory interface X3 of NXHX­PHY device
See position (5) in figure above.
Pin Signal Pin Signal
1 SPM_SIRQ# 7 SPM_CS#
2 +3.3 V 8 GND
3 SPM_DIRQ# 9 SPM_MOSI
4 GND 10 GND
5 SPM_CLK 11 SPM_MISO
6 GND 12 GND
Table 43: Pinning Serial Dual­Port Memory interface X3 of NXHX­PHY device
NXHX 51­ETM | Development Board
DOC120606HW06EN | Revision 6 | English | 2015­01 | Released | Public © Hilscher 2012 – 2015