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Global Power Technologies
1120 - Class I, Division 2, Group D, T3
3.7.3
Protective Limiter
: This is a protective device connected directly across the output of
the power unit which prevents its output voltage from rising beyond 12 volts. The sche-
matic diagram for the protective limiter is shown in Figure 19. Refer to Figure 29 for the
location of the limiter resistors and limiter converter board.
The limiter is designed to operate in a linear mode (good regulation) up to a power level of 102
watts. Above 102 watts it saturates (fully on) and the limiter goes into a nonlinear mode. As it
goes from linear to nonlinear the limit voltage begins to increase slightly.
When the TEG is set up to produce rated power, its output is 90 watts at 11.4 volts (or 12 watts
below the saturation point of the limiter). In no case will the limiter allow the voltage to rise
beyond 12 volts.
The limiter circuit operates in the following manner. Referring to Figure 18 and Figure 19, note
that the limiter is connected directly across the TEG output. The normal state of the limiter
circuit is that all transistors are turned OFF. As the TEG voltage approaches the limiter set
point, dictated by the voltage divider adjustment of the 10K trim pot, the 2N4403 and IRFPO44
transistors gradually turn ON. The degree at which the IRFPO44 is turned ON depends on the
current flow from the TEG required to maintain the set point voltage. The limiter will have a
good regulation until the IRFP044 becomes saturated.
3.7.4
DC/DC Converter
: The converter PCB assembly is shown in Figure 29, item F11. All
components are mounted on the PCB attached to the door assembly. The DC/DC
Converter schematic is shown in Figure 18.
This converter is a high efficiency switching regulator designed to step the TEG output voltage
up to 12 V or 24 V nominal. The dip switch settings for the different outputs are shown in Figure
18. Fine tuning of the output voltage is accomplished by adjusting S4 located on the front of
the electronics box.
The TL497A switching regulator IC is used to drive the IRFD110 FET, which in turn drives the
IRFPO44 FET. The pulse width modulation from the TL497A determines the switching duty
cycle of the FETs which determines the increase in voltage across L1. The SR3040 isolation
diodes are located before and after the low pass filter which consists of transformer T1 and two
2200 µF capacitors.
The input current is limited through the shunt mounted to the main PCB. The LM2908 Op-Amps
drive transistor 2N4401 which increases the current limit sense voltage drop at pin 13 of the
TL497 as it turns on. The 20K trim pot is used to set the gain of the OP-AMP to limit the current
at 15 AMPs. This is factory set and should not be adjusted by field personnel.
3.7.5
Voltage Sensing Relay Circuit (VSR)
: Refer to Figure 19. The VSR circuit uses a
LM311 voltage comparator to operate the relay K1. The 2.5 Volt level created by the
LM285Z 2.5 voltage reference is used as one input while the output from the tap of the
10K trim pot is used as the other. The LM317T is configured as a 10.0 volt regulator to
provide a stable voltage for the relay and comparator to operate with either a 12 or 24V
output voltage. The 10K trim pot is set so that the relay is energized for normal opera-
tion, and de-energizes for an alarm. The relay contacts are brought out to the edge of
the main PCB shown in Figure 30.
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