General Standards Corporation PCI-DIO24PMC-DIO24PCI-DIO24-GD1, User Manual

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DIO24, User Manual
5.1.15. PCI Min_Gnt Register
(Offset 0x3E, Reset 0x00)
D7:0 Minimum Grant
Specifies the minimum burst period the device needs assuming a clock rate of 33 MHz. Value is in
250 nsec increments. A ‘0’ indicates no stringent requirement.
5.1.16. PCI Max_Lat Register
(Offset 0x3F, Reset 0x00)
D7:0 Maximum Latency
Specifies the maximum burst period the device needs assuming a clock rate of 33 MHz. Value is
in 250 nsec increments. A ‘0’ indicates no stringent requirement.
5.2. Local Configuration Registers
The Local Configuration registers give information on the Local side implementation. Since Local Expansion ROM,
Local Address Space 1, and Direct Master accesses are not implemented on the DIO24, the descriptions of these
registers have been omitted. Most of the Local Configuration Registers are preloaded from the serial EEPROM at
system reset.
Table 7
Register map of the Local Configuration Registers.
PCI
CFG
Addr
Local
Offset
Addr
PCI/Local
Writable
Register Name Value after
Reset
0x00 0x80 Y Range for PCI to Local Address Space 0 0xFFFFF000
0x04 0x84 Y Local Base Address (Remap) for PCI to Local Address Space 0
(Unused) 0x00000000
0x08 0x88 Y Mode/Arbitration Register 0x00000000
0x0C 0x8C Y Big/Little Endian Descriptor 0x00000000
0x10 0x90 Y Range for PCI to Local Expansion ROM (Unused) 0x00000000
0x14 0x94 Y Local Base Address (Re-map) for PCI to Local Expansion
ROM and BREQo control (Unused) 0x00000000
0x18 0x98 Y Local Bus Region Descriptions for PCI Local Accesses 0x00000000
0x1C 0x9C Y Range for Direct Master to PCI (Unused) 0x00000000
0x20 0xA0 Y Local Base Address for Direct Master to PCI Memory (Unused) 0x00000000
0x24 0xA4 Y Local Base Address for Direct Master to PCI Memory IO/CFG
(Unused) 0x00000000
0x28 0xA8 Y PCI Base Address (Re-map) for Direct Master to PCI (Unused) 0x00000000
0x2C 0xAC Y PCI Configuration Address Register for Direct Master to PCI
IO/CFG (Unused) 0x00000000
0xF0 0x170 Y Range for PCI to Local Address Space 1 (Unused) 0x00000000
0xF4 0x174 Y Local Base Address (Remap) for PCI to Local Address Space 1
(Unused) 0x00000000
0xF8 0x178 Y Local Bus Region Descriptor (Space 1) for PCI to Local
Accesses (Unused) 0x00000000
5.2.1. Local Address Space 0 Range Register for PCI to Local Bus
(PCI 0x00, Reset 0xFFFFF000)
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