Troubleshooting
89
12h
Restore processor control word during warm boot
13h
Initialize PCI bus mastering devices
14h
Initialize keyboard controller
16h
1-2-2-3
BIOS ROM checksum
17h
Initialize cache before memory auto-size
18h
8254 timer initialization
1Ah
8237 DMA controller initialization
1Ch
Reset programmable interrupt controller
20h
1-3-1-1
Test DRAM refresh
22h
1-3-1-3
Test 8742 keyboard controller
24h
Set ES segment register to 4 GB
28h
Auto-size DRAM
29h
Initialize POST Memory Manager
2Ah
Clear 512 kb base RAM
2Ch
1-3-4-1
RAM failure on address line xxxx*
2Eh
1-3-4-3
RAM failure on data bits xxxx* of low byte of memory bus
2Fh
Enable cache before system BIOS shadow
32h
Test processor bus-clock frequency
33h
Initialize Phoenix Dispatch Manager
36h
Warm start shut down
38h
Shadow system BIOS ROM
3Ah
Auto-size cache
3Ch
Advanced configuration of chipset registers
3Dh
Load alternate registers with CMOS values
42h
Initialize interrupt vectors
45h
POST device initialization
46h
2-1-2-3
Check ROM copyright notice
48h
Check video configuration against CMOS
49h
Initialize PCI bus and devices
4Ah
Initialize all video adapters in system
4Bh
QuietBoot start (optional)
4Ch
Shadow video BIOS ROM
Test
Point
Beep
Code
POST Routine Description
* If the BIOS detects error 2C or 2E, it displays an additional word-bitmap (xxxx) indicating
the address line or bits that failed. For example, “2C 0002” means address line 1 (bit one
set) has failed. “2E 1020” means data bits 12 and 5 (bits 12 and 5 set) have failed in the
lower 16 bits.
8507328.book Page 89 Thursday, February 15, 2001 11:28 AM
Summary of Contents for 7450R
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