MB91F465XA EMULATION
Chapter 5 Appendix
© Fujitsu Microelectronics Europe GmbH
- 29 -
MCU-AN-300015-E-V11
Bit
Name
Function
Bit31- Bit9
RSV: Reserved
These bits are reserved. “0” is read. Write “0”.
bit8 - bit7
SDIV[1:0]:
Division for system
clock
These bits control the division for system clock. This
function is supported in MB88121A and MB88121B.
These bits are reserved in MB88121. In MB88121,
“0” is read and write “0”.
SDIV[1] SDIV[0] Function
0
0
System clock is divided by 1
0
1
System clock is divided by 2
1
0
System clock is divided by 4
1
1
System clock is divided by 8
<<Note>>
When FlexRay controller can receive or transmit
data, these bits must not be changed.
Bit 6
RSV: Reserved
This bit is reserved. Always write “0”.
Bit 5
STOP:
Clock Stop
This bit stops the system clock. If this bit set to “1”,
the system clock is stopped. But the oscillator is
active.
When this bit is set to “1”, please carry out the
following procedures.
- PLL On
1) Stop receiving and transmitting for FlexRay
controller.
2) Set “0” to SSEL bit.
3) Set “0” to PON bit.
4) Set “1” to STOP bit.
- PLL Off
1) Stop receiving and transmitting for FlexRay
controller.
2) Set “1” to STOP bit.
When this bit is changed into “0” from “1”, please
carry out in the following procedures.
- PLL On
1) Set “1” to PON bit.
2) Set “0” to STOP bit.
3) Set “1” to SSEL bit after PLL lock up time
(600us).
4) Enable to receive and transmit data for
FlexRay controller.
- PLL Off
1) Set “0” to STOP bit.
<<Note>>
When FlexRay controller can receive or transmit
data, these bits must not be changed.
