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FUJITSU SEMICONDUCTOR CONFIDENTIAL
MB86R12 Application Note
DDR3 Interface PCB
Design Guideline
5. Power system design restrictions
This chapter describes the power system design restrictions for the DDR3 interface part of MB86R12.
5.1.
Number and capacity of bypass capacitor
Table 5-1 shows recommended number of bypass capacitors for the high frequency noise removal for
which mounting is necessary directly under MB86R12.
Table 5-1 Recommended number of bypass capacitors
Pin name of
MB86R12
Power supply
voltage
Recommended number of
bypass capacitors
Remarks
0.1µF
DDRVDE
1.5V
18
For DDR3 interface
VSS
0V
-
•
If capacity is a value close to 0.1µF (0.22µF etc. for instance), the bypass capacitor can be used.
•
Place the 0.1µF capacitor as close as possible to the power/GND pins of MB86R12 (refer to "5.2.
Pull-out wiring condition").
•
For the 0.1µF capacitor, we recommend the use of ceramic capacitors of under size 1005
(1.0mm × 0.5mm).
In addition, use low ESL (Equivalent Series Inductance) value components where possible in order to
decrease noise.
•
Mount a high-capacity capacitor for the low frequency if needed. One 100µF is recommended to be
used for the current variation of 1A only as a guide.
•
Verify your board design by simulations and measurements if you can not mount capacitors of the
above number.
