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C141-E123-01EN

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Note:

These requirements shall be satisfied if any device supplies the TERMPWR.

b. Single-ended output signal characteristics

An active negate driver shall be used for single-ended line signals. This driver can be in the Assert,
Negate, or High-Impedance state. Each signal supplied by the SCSI device shall have the following
output characteristics when measured at the connector position of SCSI device:

1)

V

OL

(Low-level output voltage) = 0.0 to 0.5 VDC if I

OL

=48 mA (Signal assert state)

2)

V

OH

(High-level output voltage) = 2.5 to 3.7 VDC (Signal negate state)

3)

The output characteristics (in signal negate state) shall be limited to allow operations in
the non-shaded areas only of Figure 1.38.

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Summary of Contents for MAN3184 SERIES

Page 1: ...C141 E123 01EN MAN3184 MAN3367 MAN3735 SERIES DISK DRIVES SCSI PHYSICAL INTERFACE SPECIFICATIONS ...

Page 2: ...damage or other loss hereinafter High Safety Required Use including without limitation nuclear power core control airplane control air traffic control mass transport operation control life support weapon launching control You shall not use this Product without securing the sufficient safety required for the High Safety Required Use If you wish to use this Product for High Safety Required Use pleas...

Page 3: ... Use the product according to this manual Functional Limitations There may be certain functional limitations concerning the specifications and functions of the products covered by this manual depending on the equipment version especially concerning the following functions Versions in which there functions can be used will be communicated through ENGINEERING CHANGE REQUEST NOTICE issued by Fujitsu ...

Page 4: ... manual comply with the following standards Standard Text No Name Enacting Organization T10 1302D Rev 14 final Working Draft American National Standard Information Technology SCSI Parallel Interface 3 American National Standards Institute ANSI All Rights Reserved Copyright 2001 Fujitsu Limited ...

Page 5: ... REVISION RECORD Edition Date published Revised contents 01 Mar 2001 Specification No C141 E123 EN The contents of this manual is subject to change without prior notice All Rights Reserved Copyright 2001 FUJITSU LIMITED ...

Page 6: ...This page is intentionally left blank ...

Page 7: ...ned Manual Configuration and Contents This manual consists of the following three chapters and the terminologies and abbreviations sections Chapter 1 SCSI Bus This chapter describes the configuration physical and electrical requirements interface protocol and other operations of the Small Computer System Interface SCSI which connects the MAN3184 MAN3367 MAN3735 series intelligent disk drives to th...

Page 8: ...TARG on the SCSI bus The IDD is called TARG in this chapter except when clear identification is required Notations A decimal value is indicated as it is in this manual A hexadecimal value is indicated in the X 17B9 or 17B9h or 17B9H notation A binary value is indicated in the notation similar to 010 The disk drive model name has a different suffix depending on its SCSI electrical characteristics c...

Page 9: ...Type AN 1 inch height 10 025 rpm Note 2 Typical model name Type model name Model name MAN3184 MAN3184MP MAN3184MC MAN3367 MAN3367MP MAN3367MC MAN3735 MAN3735MP MAN3735MC Requesting for User s Comments Please use the User s Comment Form attached to the end of this manual to identify user comments including error inaccurate and misleading information of this manual Contact to your Fujitsu representa...

Page 10: ... Installation Diagnostics and Maintenance Error Analysis Principle of Operation SCSI Physical Interface Specifications SCSI Bus SCSI Message Error Recovery SCSI Logical Interface Specifications Command Processing Data Buffer Management Command Specifications Parameter Data Formats Sense Data and Error Recovery Methods Disk Media Management ...

Page 11: ...6 1 5 Timing Rule 1 28 1 5 1 Timing value 1 28 1 5 2 Measurement point 1 35 1 6 Bus Phases 1 39 1 6 1 BUS FREE phase 1 40 1 6 2 ARBITRATION phase 1 41 1 6 3 SELECTION phase 1 44 1 6 4 RESELECTION phase 1 48 1 6 5 INFORMATION TRANSFER phases 1 51 1 6 5 1 Asynchronous transfer mode 1 52 1 6 5 2 Synchronous mode 1 55 1 6 5 3 Wide mode transfer 16 bit SCSI 1 65 1 6 6 COMMAND phase 1 65 1 6 7 DATA phas...

Page 12: ... 1 2 1 1 Message format 2 1 2 1 2 Message type 2 2 2 1 3 Message protocol 2 4 2 2 SCSI Pointer 2 5 2 3 Message Explanation 2 8 2 3 1 TASK COMPLETE message X 00 T I 2 8 2 3 2 SAVE DATA POINTER message X 02 T I 2 8 2 3 3 RESTORE POINTERS message X 03 T 1 2 8 2 3 4 DISCONNECT message X 04 T I 2 8 2 3 5 INITIATOR DETECTED ERROR message X 05 I T 2 9 2 3 6 ABORT TASK SET message X 06 I T 2 9 2 3 7 MESSA...

Page 13: ...3 T I 2 14 2 3 18 IDENTIFY message X 80 to X FF I T 2 15 2 3 19 SYNCHRONOUS DATA TRANSFER REQUEST message I T 2 16 2 3 20 WIDE DATA TRANSFER REQUEST message I T 2 24 2 3 21 PARALLEL PROTOCOL REQUEST message I T 2 28 CHAPTER 3 ERROR RECOVERY 3 1 3 1 Error Conditions and Retry Procedure 3 1 3 2 Recovery Control 3 6 GLOSSARY GL 1 ABBREVIATION AB 1 ...

Page 14: ...17 1 13 Single Ended SCSI termination circuit 2 1 18 1 14 LVD SCSI termination circuit 1 20 1 15 Circuit for mated indications 1 23 1 16 16 bit SCSI not SCA2 terminating resistor circuit 1 24 1 17 Fast 5 10 Measurement Point 1 35 1 18 Fast 20 Measurement Point 1 36 1 19 LVD ST Data Transfer measurement point 1 37 1 20 LVD DT Data Transfer measurement point 1 38 1 21 BUS FREE phase 1 40 1 22 ARBITR...

Page 15: ...l 1 SCAM target 1 86 1 37 State of level 2 SCAM target 1 87 1 38 Comparison of active negate current and voltage 1 92 1 39 Single ended test circuit 1 93 1 40 LVD transceiver architecture 1 95 1 41 Connection to the LVD receivers 1 95 1 42 Differential SCSI bus capacitive loading 1 96 2 1 Message format 2 2 2 2 SCSI pointer configuration 2 7 ...

Page 16: ...es and signal sources 1 27 1 15 SCSI bus control timing values 1 28 1 16 SCSI bus data information phase ST timing values 1 28 1 17 SCSI bus data information phase DT timing values 1 29 1 18 Parameters used for fast synchronous data transfer mode 1 67 1 19 Retry count setting for RESELECTION phase 1 71 1 20 Maximum capacitance 1 97 1 21 System level requirements 1 98 2 1 SCSI message 2 3 2 2 Exten...

Page 17: ...C141 E123 01EN xv 2 12 PARALLEL PROTOCOL REQUEST message implied agreement 2 32 3 1 Retry procedure for SCSI error 3 7 ...

Page 18: ...This page is intentionally left blank ...

Page 19: ... 1 1 System Configuration Up to 16 bit SCSI series models can be connected to the system via the SCSI bus Figure 1 1 gives an example of multi host system configuration Each SCSI device operates as an initiator INIT or a target TARG Only a single INIT and a single TARG selected by this INIT can operate simultaneously on the SCSI bus The system configuration allows any combination of a SCSI device ...

Page 20: ...ro 0 The SCSI ID can be 0 to 15 Note The maximum number of SCSI devices and the maximum cable length are limited depending on the selected SCSI data transfer mode and the SCSI transceiver type Appropriate SCSI devices and cable length must be determined for each system Figure 1 1 Example of SCSI configuration ...

Page 21: ...es The 27 signal lines consist of data buses 2 bytes plus two odd parity bits and 9 control signal lines The SCSI bus can be a single ended or low voltage differential LVD interface depending on the model used Their physical and electrical characteristics are detailed in Sections 1 3 and 1 4 P_CRCA 18 Figure 1 2 Interface signals ...

Page 22: ...y In the SELECTION or RESELECTION phase the data bus is used to send a SCSI ID of the INIT and TARG Figure 1 3 shows the relationship between the data buses and SCSI IDs DB15 DB14 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 SCSI ID 15 SCSI ID 14 SCSI ID 9 SCSI ID 8 SCSI ID 7 SCSI ID 6 SCSI ID 5 SCSI ID 4 SCSI ID 3 SCSI ID 2 SCSI ID 1 SCSI ID 0 Data bus 16 bit SCSI Figure 1 3 DATA BUS and SCSI ID a DB1...

Page 23: ...e byte plus the parity bit is odd The parity bits P1 and P_CRCA is optional for the system The IDD handles the data bus parity as follows The IDD has the data bus parity check function and can enable or disable the parity check See Section 5 3 2 SCSI Parity of the Product Manual for setup details When valid data is sent to the data bus from the IDD the parity data is always guaranteed except for t...

Page 24: ...nal specifies the information transmission direction on the data bus It is also used to identify the SELECTION phase or RESELECTION phase This signal is always driven by the TARG see Table 1 1 6 MSG MESSAGE A signal sourced by a target to indicate the MESSAGE phase or a DT DATA phase depending on whether C D is true or false Asserted indicates MESSAGE or DT DATA see Table 1 1 Table 1 1 INFORMATION...

Page 25: ...tion 10 RST RESET The RST signal is a Reset signal to clear all SCSI devices on the bus to the RESET condition 1 3 Physical Requirements All SCSI devices are connected to each other in a daisy chain Both ends of the interface cable are terminated with resistor Tables 1 2 and 1 3 define the SCSI bus electrical characteristics for interface signal driver receiver Table1 2 Single Ended maximum distan...

Page 26: ...SCSI bus connector is nonshielded 68 pin consisting of two 34 pin rows with adjacent pins 1 27 mm 0 05 inch part Figure 1 4 For the interface cable connector use a nonshielded 68 contact socket consisting of two 34 contact rows points with adjacent contact points 1 27 mm 0 05 inch apart Figure 1 5 Figure 1 6 shows single ended interface connector signal assignment Figure 1 7 shows low voltage diff...

Page 27: ...C141 E123 01EN 1 9 M M 0 61 5 16 0 001 0 396 Figure 1 5 SCSI interface connector cable side 16 bit SCSI ...

Page 28: ...13 GND DBP7 47 14 GND P_CRCA 48 15 GND GND 49 16 GND GND 50 17 TERMPWR TERMPWR 51 18 TERMPWR TERMPWR 52 19 reserved reserved 53 20 GND GND 54 21 GND ATN 55 22 GND GND 56 23 GND BSY 57 24 GND ACK 58 25 GND RST 59 26 GND MSG 60 27 GND SEL 61 28 GND C D 62 29 GND REQ 63 30 GND I O 64 31 GND DB08 65 32 GND DB09 66 33 GND DB10 67 34 GND DB11 68 Terminating resistor power Figure 1 6 Single ended connect...

Page 29: ...7 14 P_CRCA P_CRCA 48 15 GROUND GROUND 49 16 DIFFSENS GROUND 50 17 TERMPWR TERMPWR 51 18 TERMPWR TERMPWR 52 19 RESERVED RESERVED 53 20 GROUND GROUND 54 21 ATN ATN 55 22 GROUND GROUND 56 23 BSY BSY 57 24 ACK ACK 58 25 RST RST 59 26 MSG MSG 60 27 SEL SEL 61 28 C D C D 62 29 REQ REQ 63 30 I O I O 64 31 DB 8 DB 8 65 32 DB 9 DB 9 66 33 DB 10 DB 10 67 34 DB 11 DB 11 68 Terminating resistor power Figure ...

Page 30: ...ctors of the IDD are 80 pin unshielded connectors each having two rows of 40 parallel pins separated 1 27 mm or 0 05 from each other see Figure 1 8 Figure 1 9 shows the pin assignment of 16 bit SCA 2 type single ended SCSI interface connector Figure 1 8 SCA 2 type 16 bit SCSI interface connector IDD side ...

Page 31: ...ACK GND 57 18 BSY GND 58 19 ATN GND 59 20 P_CRCA GND 60 21 DB07 GND 61 22 DB06 GND 62 23 DB05 GND 63 24 DB04 GND 64 25 DB03 GND 65 26 DB02 GND 66 27 DB01 GND 67 28 DB00 GND 68 29 DBP1 GND 69 30 DB15 GND 70 31 DB14 GND 71 32 DB13 GND 72 33 DB12 GND 73 34 5V 5V RETURN MATED2 74 35 5V 5V RETURN GND 75 36 5V CHARGE 5V RETURN GND 76 37 Reserved LED 77 38 RMT_START DLYD_START 78 39 SCSI ID0 SCSI ID1 79 ...

Page 32: ...55 16 RST RST 56 17 ACK ACK 57 18 BSY BSY 58 19 ATN ATN 59 20 P_CRCA P_CRCA 60 21 DB 7 DB 7 61 22 DB 6 DB 6 62 23 DB 5 DB 5 63 24 DB 4 DB 4 64 25 DB 3 DB 3 65 26 DB 2 DB 2 66 27 DB 1 DB 1 67 28 DB 0 DB 0 68 29 DB P1 DB P1 69 30 DB 15 DB 15 70 31 DB 14 DB 14 71 32 DB 13 DB 13 72 33 DB 12 DB 12 73 34 5V 5V RETURN MATED2 74 35 5V 5V RETURN GND 75 36 5V CHARGE 5V RETURN GND 76 37 Reserved LED 77 38 RM...

Page 33: ... AWG stranded multiple loads allowed 0 to 12 0 05092 mm2 30 AWG solid 0 08042 mm2 28 AWG stranded multiple loads allowed 12 to 25 0 05092 mm2 30 AWG solid 0 08042 mm2 28 AWG stranded point to point only A twisted pair cable must consist of pin n and pin n 1 where n is an odd number of the interface connector Use the SCSI bus cables having the same impedance characteristics to minimize the signal r...

Page 34: ...C141 E123 01EN 1 16 a Connection to a middle point of the cable b Connection to the end of the cable Figure 1 11 Connection of interface cable ...

Page 35: ...ch terminator should source current to the signal line whenever its terminal voltage is below 2 5 VDC and this current should not exceed 22 4 mA for any line voltage at or above 0 5 VDC and 25 4 mA for any line voltage between 0 5 VDC and 0 2 VDC even when all other signal lines are driven at 4 0 VDC 3 The voltage on all released signal lines should be at least 2 5 VDC 4 These conditions should be...

Page 36: ...01EN 1 18 The IDD uses the terminator circuit satisfying conditions b above The INIT terminator circuit is also recommended to meet conditions b above P_CRCA DB Figure 1 13 Single Ended SCSI termination circuit 2 ...

Page 37: ...6 Output characteristic Driver Type Value Min Max Notes Passive Negation VOL 0 0 0 5 IOL 48mA VOH 2 5 5 25 Active Negation VOL 0 0 0 5 IOL 48mA VOH 2 5 3 7 Table 1 7 Input characteristic Maximum transfer mode Min Max Notes VIL VDC 0 8 VIH VDC 2 0 Fast 5 IIL mA 0 4 0 0 VI 0 5VDC IIH mA 0 0 0 1 VI 2 7VDC Minimum input hysteresis VDC 0 2 VIL VDC 0 8 VIH VDC 2 0 VI 0 5VDC Fast 10 IIL µA 20 20 VI 2 7VD...

Page 38: ...7438 TI Open collector NAND gate Receiver SN74LS240 or SN74LS19 TI Shumitt trigger input inverter 1 4 2 Low Voltage Differential type 1 Termination circuit All signals except for GROUND and TERMPWR should be terminated at both ends of the bus Each signal should be terminated Figure 1 14 shows the termination circuit P_CRCA P_CRCA Figure 1 14 LVD SCSI termination circuit ...

Page 39: ...ver LVD SCSI devices shall incorporate a LVD DIFFSENS receiver that detects the voltage level on the DIFFSENS line for purposes of informing the device of the transmission mode being used by the bus The LVD DIFFSENS receiver shall be capable of detecting SE and LVD SCSI devices Table 1 9 define the receiver input levels for each of the two modes Table 1 9 DIFFSENS receiver operating requirements V...

Page 40: ...or through optional logic in such a manner that the MATED 1 signal is held to a ground level when the MATED 2 connection is completed The SCSI device shall sink no more than 100 mA to ground through the MATED 2 pin if optional logic is used c MATED 1 Drive Side The MATED 1 signal shall be sensed by the SCSI device When the MATED 1 connection is determined to be at a ground level the SCSI device ma...

Page 41: ... external SCSI device or to cut the power of SCSI device having a terminator the terminator power must be supplied to the TERMPWR line from any of SCSI devices of the bus The SCSI device such as a host adapter which always operates as the INIT should supply the power The terminating resistor power shall be supplied to the TERMPWR line through a diode to prevent a reverse current Table 1 10 lists t...

Page 42: ...g on the IDD system requirements 23 24 16 bit SCSI P connector setting terminal CN2 23 24pin Supply TERMPWR to SCSI Bus Short Don t supply TERMPWR to SCSI Bus Open Figure 1 16 16 bit SCSI not SCA2 terminating resistor circuit Notes All series have no internal terminator circuit If the terminator circuit is needed you should add the external circuit on your system ...

Page 43: ...t set up pin CN2 13 14 When the IDD is used as 16 bit SCSI device leave the set up pin Jumper setting 8 16 open Table 1 11 shows the guide Jumper setting is available only for MP series Table 1 11 Setting set up pin 16 bit wide 8 bit narrow mode Transfer mode Jumper setting 8 16 DB08 to DB15 and DBP1 Short Don t care 8bit narrow Open Should be terminated externally 16bit wide Should be opened Don ...

Page 44: ...rives a signal The signal becomes false when the terminating resistor circuit is biased A particular SCSI device drives the signal false Otherwise no SCSI device drives the signal True A SCSI device drives the signal true 1 In this manual the signal is said to be false if one of the following conditions is satisfied 1 The signal is actually driven by a SCSI device to become false non OR tied type ...

Page 45: ...y SCSI device can drive the signal Also two or more SCSI devices may drive the signal simultaneously I Only the INIT SCSI device drives the signal I T The INIT and TARG SCSI devices drive the signal in the interface operating sequence INIT TARG or both can drive this signal according to the interface sequence I or T The INIT or TARG SCSI device or both devices may drive the signal depending on the...

Page 46: ...lues Timing values ns 5 Timing description Type Async Fast 5 Fast 10 Fast 20 Fast 40 1 ATN Transmit Setup Time min 90 33 33 21 5 19 25 2 ATN Receive Setup Time min 45 17 17 8 5 6 75 3 Cable Skew 3 max 4 4 4 3 2 5 4 Receive Assertion Period 4 min N A 70 22 11 6 5 5 Receive Hold Time 4 min N A 25 25 11 5 4 75 6 Receive Negation Period 4 min N A 70 22 11 6 5 7 Receive Setup Time 4 min N A 15 15 6 5 4...

Page 47: ...smit Hold Time 7 min 38 4 19 2 9 6 4 8 19 Transmit Negation Period 7 min 92 46 23 11 5 20 Transmit Setup Time 7 min 38 4 19 2 9 6 4 8 21 Transmit REQ ACK Period Tolerance max 0 6 0 6 0 6 0 6 22 Transmit REQ Assertion Period with P_CRCA transitioning min 97 5 54 35 5 24 23 Transmit REQ Negation Period with P_CRCA transitioning min 97 5 54 35 5 24 Note 6 Cable Skew is measured at each device connect...

Page 48: ...all wait from its detection of the BUS FREE phase BSY and SEL both false for a bus settle delay until its assertion of the BSY signal in preparation for entering the ARBITRATION phase 6 Bus set delay The maximum time for a SCSI device to assert the BSY signal and its SCSI ID after it detects a BUS FREE phase for the purpose of entering the ARBITRATION phase 7 Bus settle delay The minimum time to w...

Page 49: ...ntil asserting the BSY signal in response This time out is required to ensure that a target or initiator does not assert the BSY signal after a SELECTION or RESELECTION phase has been aborted 17 Selection time out delay The minimum time that an initiator or target should wait for a assertion of the BSY signal during the SELECTION or RESELECTION phase before starting the time out procedure Note tha...

Page 50: ...onous data transfers For DT data transfers the minimum time required at the receiving SCSI device between the changing of the DB 15 0 P_CRCA and or P1 signals and the transition of the REQ or ACK signals while using synchronous data transfers 23 Receive REQ ACK period tolerance The minimum tolerance that a SCSI device should allow to be subtracted from the REQ ACK period The tolerance comprises th...

Page 51: ...all negate the ACK signal while using synchronous data transfers 29 Transmit setup time For ST data transfers the minimum time provided by the transmitting SCSI device between the changing of the DB 15 0 P_CRCA and or P1 signals and the assertion of the REQ or ACK signal while using synchronous data transfers For DT data transfers the minimum time provided by the transmitting SCSI device between t...

Page 52: ...s longer than the receive hold time plus the receive setup time 36 Receive REQ negation period with P_CRCA transitioning The minimum time required at a SCSI device receiving an REQ signal for the signal to be negated while using synchronous data transfers with P_CRCA transitioning with pCRC protection enabled Specified to ensure that the negation period is longer than the receive hold time plus th...

Page 53: ...3 01EN 1 35 1 5 2 Measurement point 1 SE Fast 5 10 The measurement point of Fast 5 10 is different from that of Fast 20 The Figure 1 17 is the Fast 5 10 measurement point Figure 1 17 Fast 5 10 Measurement Point ...

Page 54: ...C141 E123 01EN 1 36 2 SE Fast 20 Figure 1 18 is the Fast 20 measurement point Figure 1 18 Fast 20 Measurement Point ...

Page 55: ...int Notes 1 VN negated signal 2 VA asserted signal 3 tm 1 25ns minimum 4 VA or VN are required to drive the 100 mV at the leading edge of the transition Those signals shall be at least 100 mV for at least tm before and after the transition 5 Differential voltage signals in all cases 6 taf and tar shall be less than 3 ns 7 Any signal structure may occur at the receiver while in the taf or tar regio...

Page 56: ...erted signal 3 tm 1 25ns minimum 4 VA or VN are required to drive the 100 mV at the leading edge of the transition Those signals shall be at least 100 mV for at least tm before and after the transition 5 Differential voltage signals in all cases 6 taf and tar shall be less than 3 ns 7 Any signal structure may occur at the receiver while in the taf or tar region including slope reversal ...

Page 57: ...ON phase RESELECTION phase COMMAND phase DATA phase STATUS phase MESSAGE phase The SCSI bus can never be in more than one phase at any given time Note In the following bus phase conditions signals are false unless otherwise defined Signals on the timing charts are assumed to be positive logic or active high INFORMATION TRANSFER phase ...

Page 58: ...ithin one Bus Clear Delay after BSY and SEL signals become false for Bus Settle Delay If a SCSI device requires more than Bus Settle Delay to detect the BUS FREE phase it shall release all bus signals within the following period t t Bus Clear Delay Period required for BUS FREE phase detection Bus Settle Delay The maximum time allowed for releasing the bus after both SEL and BSY becomes false is Bu...

Page 59: ... expected it should issue a REQUEST SENSE command to read the sense data 1 6 2 ARBITRATION phase The ARBITRATION phase allows one SCSI device to gain control of the SCSI bus The SCSI device that gets control of the SCSI bus can start the operation as INIT or TARG This is an optional system bus phase This phase is required for the system that has two or more INITs or uses the RESELECTION phase Arbi...

Page 60: ...hall assert SEL signal The SCSI device 7 in Figure 1 23 has won the arbitration Any other SCSI device that is participating in the ARBITRATION phase shall release its signals within Bus Clear Delay after SEL signal becomes true then may return to step 1 The SCSI device 3 in Figure 1 21 has lost the arbitration 5 The SCSI device which wins arbitration SCSI device 7 in Figure 1 23 shall wait at leas...

Page 61: ...C141 E123 01EN 1 43 Figure 1 22 ARBITRATION phase ...

Page 62: ... it is allowed to assert only the TARG s SCSI ID 3 After waiting at least Deskew Delay 2 the INIT asserts SEL signal and waits the response BSY signal from the TARG 2 Start sequence with ARBITRATION phase In systems with ARBITRATION phase implemented the INIT starts the SELECTION phase in the following sequence see Figure 1 23 1 The INIT shall wait for at least Bus Clear Delay Bus Settle Delay aft...

Page 63: ... at least Bus Settle Delay the SCSI device shall recognize that it is selected in the SELECTION phase At this time the selected TARG may sample all bits on the SCSI bus to identify the INIT s SCSI ID The TARG must response to the INIT by asserting the BSY signal within Selection Abort Time since the TARG detects that the TARG is selected If the SCSI ID with three or more bits is detected or if a p...

Page 64: ...INIT should keep ATN signal asserted 3 The INIT should release DB 15 0 P_CRCA and or P1 4 If the INIT has not detected the BSY signal to be true after at least one Selection Abort Time plus two System Deskew Delays the INIT should release the SEL signal and ATN signal if Selection using attention condition allowing the SCSI bus to go to the BUS FREE phase 5 SCSI devices should ensure that when res...

Page 65: ...C141 E123 01EN 1 47 Min System Deskew Delay 2 Min System Deskew Delay 2 Min System Deskew Delay 2 Min System Deskew Delay 2 Figure 1 23 SELECTION phase ...

Page 66: ...self and INIT to the SCSI bus the SCSI device that gets the bus usage right by asserting the I O signal is recognized as a TARG 3 The TARG releases the BSY signal after waiting at least Deskew Delay 2 and the TARG shall then wait the response BSY signal from the INIT after at least Bus Settle Delay passed b Parity Protection Enabled 1 The SCSI device that won arbitration has both the BSY and SEL s...

Page 67: ... bit is enabled on the data bus the INIT shall not respond to the RESELECTION phase When TARG detects the response BSY signal from INIT the TARG asserts BSY signal and waits at least Deskew Delay 2 then the TARG releases SEL signal At this time the TARG may change the I O signal state and value on the SCSI bus The INIT shall release the BSY signal after making sure that the SEL signal becomes fals...

Page 68: ... SEL and I O signals true and stops sending the SCSI ID to the data bus Subsequently the INIT waits for the response from TARG for at least Selection Abort Time Deskew Delay 2 If no response is detected the INIT releases the SEL and I O signals allowing the SCSI bus to go to the BUS FREE phase If the INIT detects the response from the TARG during this period the INIT considers the SELECTION phase ...

Page 69: ...formation transfer modes synchronous and asynchronous transfer modes They differ from each other by their REQ signal transmission and ACK signal response methods called the REQ ACK handshaking Also the 16 bit SCSI bus can transfer 16 bit wide data only in the DATA phase The 16 bit SCSI bus can transfer 16 bit wide data only in the DATA phase except alternate error detection for the asynchronous in...

Page 70: ...by each other it is called the interlock control The asynchronous transfer can be used in all types of INFORMATION TRANSFER phase such as COMMAND DATA STATUS and MESSAGE Figure 1 26 shows the timing of asynchronous transfer If the wide mode data transfer is established between the INIT and TARG the two byte data DB15 to DB0 DBP1 DBP_CRCA is transferred on the 16 bit SCSI bus Otherwise single byte ...

Page 71: ...lay after sending valid information of the requested type on the data bus The information on the data bus must be maintained until the REQ signal becomes false on the INIT 3 The TARG fetches data from the data bus after the ACK signal becomes true and negates the REQ signal to report the completion of reception 4 When the REQ signal becomes false on the INIT the INIT negates the ACK signal After t...

Page 72: ...C141 E123 01EN 1 54 Figure 1 26 Transfer in asynchronous mode Min Min System Deskew Delay Cable Skew Delay System Deskew Delay Cable Skew Delay ...

Page 73: ... some possible times when a SCSI device could try to enable protection code checking During the first COMMAND MESSAGE or STATUS phase After a UNIT ATTENTION condition During the MESSAGE phase of a negotiation Protection code errors are handled exactly parity errors during COMMAND MESSAGE or STATUS phases But this parity error outputs will be logically OR d into the existing parity error logic Ther...

Page 74: ... pulses before receiving an ACK signal response if these pulses do not exceed the limit specified by the REQ ACK Offset parameter When the difference between the REQ and ACK signal pulses has reached this limit at the TARG the TARG shall not send a REQ pulse until it receives the leading edge of the next ACK pulse The data transfer in DATA phase can complete normally only when the REQ and ACK sign...

Page 75: ...CA or DB 15 0 P_CRCA P1 signals valid for at least one Transmit Hold Time after the assertion of the ACK signal 6 The INIT asserts the ACK signal for a minimum of one Transmit Assertion Period 7 The INIT may then negate the ACK signal and change or release the DB 7 0 P_CRCA or DB 15 0 P_CRCA P1 signals 8 The TARG reads the value of the DB 7 0 P_CRCA or DB 15 0 P_CRCA P1 signals within one Receive ...

Page 76: ...n Transmit Hold Time Min Transmit Assertion Period Min Received Hold Time I O REQ ACK DB Timing rule for INIT to TARG Min Transmit Setup Time Min Transmit Hold Time Min Transmit Assertion Period Min Received Hold Time I O REQ ACK DB Figure 1 27 ST transfer in synchronous mode ...

Page 77: ...ts transfer only Either 8 bit or 16 bit transfer is available 3 MSG signal is asserted MSG signal negated 4 P_CRCA P1 signals are used as Data Group Transfer enabled 5 Both edge of the REQ ACK is available in the data transmission Only trailing edge is available Data group contains three fields They are Data field Pad field pCRC field The following description is about each field transfer a Data G...

Page 78: ...a pad field is required if the I O signal is true the target has completed the data field transfer of the current data group and REQ signal is asserted Pad field required 1 TARG waits at least one pCRC transmit hold time since the last REQ assertion to assert P_CRCA 2 TARG waits at least one transmit hold time since the last REQ assertion to assert the DB 15 0 signals to their desired pad values 3...

Page 79: ... group 5 TARG waits at least one transmit REQ negation period with P_CRCA transitioning since the last REQ negation 6 TARG asserts the REQ signal and holds the DB 15 0 signals valid for a minimum of one transmit hold time and the REQ signal asserted for a minimum of a transmit assertion period 7 TARG drives the DB 15 0 signals to their desired pCRC values and waits at least one transmit setup time...

Page 80: ...Pad field data and pCRC field data are transferred using the same negotiated values as the data field data The TARG may continue to send REQs up to the negotiated offset for the next data group The TARG shall not transition REQ with P_CRCA asserted until the initiator has responded with all ACK transitions for the previous data group When the INIT detects an assertion of the P_CRCA signal and the ...

Page 81: ... has ended a data group As a result of a data group always being an even number of transfers the REQ and ACK signals are negated both before and after the transmission of the data group The TARG fetches the value of the DB 15 0 signals within one receive hold time of the transition of the ACK signal The INIT uses the pad bytes if any in the generation of the transmitted pCRC The TARG then uses tho...

Page 82: ...pCRCA transitioning transmit hold pCRC transmit hold transmit setup pCRC transmit setup pCRC transmit hold pCRC value pCRC value data value 100 mV 100 mV 0 V 100 mV 100 mV Pad field required Pad field no required P_CRCA DB15 0 REQ 100 mV 100 mV 100 mV 100 mV 100 mV 100 mV 0 V 0 V pCRC receive hold pCRC receive setup receive setup receive hold ACK 100 mV 100 mV 0 V Figure 1 28 Data Group Pad field ...

Page 83: ...on occurs or a TARGET RESET message is received data is transferred using 8 bit mode until the mode is switched to 16 bit mode by exchanging the WIDE DATA TRANSFER REQUEST message Number of information items transferred P cable 1 Unused A 8 bit mode 2 Unused B DB15 DB8 DB7 DB0 1 B A 16 bit mode Figure 1 29 Data sequence at data transfer 1 6 6 COMMAND phase The COMMAND phase is a bus phase in which...

Page 84: ... IN phase The ST DATA IN phase allows the target to request that data be sent to the initiator from the target using ST data transfers The target shall assert the I O signal and negate the C D and MSG signals during the REQ ACK handshake s of this phase 4 ST DATA OUT phase The ST DATA OUT phase allows the target to request that data be sent from the initiator to the target using ST data transfers ...

Page 85: ... 20 00 MB s X 1F 120 ns 1 Maximum 16 00 MB s X 25 150 ns 1 Maximum 13 33 MB s X 2B 175 ns 1 Maximum 11 42 MB s X 32 200 ns Maximum 10 00 MB s X 38 225 ns Maximum 8 88 MB s X 3E 250 ns Maximum 8 00 MB s X 44 275 ns Maximum 7 27 MB s X 4B 300 ns Maximum 6 66 MB s X 51 325 ns Maximum 6 15 MB s X 57 350 ns Maximum 5 71 MB s PPR Transfer Period 5 X 5D 375 ns N A Maximum 5 33 MB s X 0A 25 ns 3 Maximum 4...

Page 86: ...e of a multiple byte message If the message consists of more than one byte all bytes must be transferred in a single MESSAGE phase For details of message types and their operation refer to Chapter 2 1 MESSAGE IN phase In a MESSAGE IN phase the TARG requests to transfer message information from the TARG to the INIT The TARG keeps the C D I O and MSG signals true during REQ ACK handshaking in this p...

Page 87: ...the BUS FREE phase for example ABORT TASK SET and TARGET RESET messages 1 6 10 Signal requirements concerning transition between bus phases If an SCSI bus is at an intermediate point of two INFORMATION TRANSFER phases during transition of bus phase the interface signals must satisfy the following requirements a The BSY SEL and ACK signals must not change b The REQ signal must not change until it i...

Page 88: ...T releases the P_CRCA signal within one Data Release Delay after the transition of the C D signal to false When switching the P_CRCA signal direction from in TARG driving to out INIT driving 1 The TARG releases the P_CRCA signal within one System Deskew Delay after asserting the C D signal 2 The INIT negates the P_CRCA signal more than one System Deskew Delay after the detection of the assertion o...

Page 89: ...response within a specified period 250 ms the IDD executes the timeout process see Section 1 6 4 and releases the SCSI bus once After that the IDD executes the retry process of the RESELECTION phase see Section 3 1 The user can select the number of retries of the RESELECTION phase by the CHANGE DEFINITION command Table 1 19 Retry count setting for RESELECTION phase RSRTY bit Retry count for RESELE...

Page 90: ...ng timing is delayed the TARG may not be informed of the ATTENTION condition until the next bus phase The INIT may not operate as it should When transferring message information in several bytes in the MESSAGE OUT phase the INIT must keep the ATN signal true The INIT can make the ATN signal false any time except while the ACK signal is true in the MESSAGE OUT phase When transferring the last byte ...

Page 91: ...OUT phase immediately after the SELECTION phase When the ATN signal becomes true in the RESELECTION phase the TARG shall start the MESSAGE OUT phase after the end of IDENTIFY message transfer During a RESELECTION phase the INIT should only create an attention condition to transmit an ABORT TASK SET ABORT TASK TARGET RESET CLEAR TASK SET DISCONNECT LOGICAL UNIT RESET or NO OPERATION message Other u...

Page 92: ...e 1 32 ATTENTION condition Note The ATTENTION condition generated by the INIT determines the message level to be used in the command execution sequence Details are explained in Section 2 1 3 If the ATTENTION condition is not generated the TARG uses a TASK COMPLETE message only ...

Page 93: ...the disk drive 3 Initializes the operation mode to its initial status just after power on if it has been set by the message or command The current value of the parameter set by the MODE SELECT command is initialized to the saved value previously established If the value is not saved it is initialized to the default value The synchronous transfer parameters defined between the IDD and other SCSI de...

Page 94: ...e in order to report an error condition For details see Section 1 6 1 Figure 1 34 shows the allowable bus phase sequence Figure 1 35 provides an example of bus phase sequence during single command execution Note Figure 1 34 shows the bus phase sequence applied to the system which uses the ARBITRATION phase and the system which does not use the phase Also this figure compares the operations when th...

Page 95: ...C141 E123 01EN 1 77 Figure 1 34 Bus phase sequence 1 of 2 ...

Page 96: ...C141 E123 01EN 1 78 Figure 1 34 Bus phase sequence 2 of 2 ...

Page 97: ...C141 E123 01EN 1 79 Figure 1 35 Example of bus phase transition at execution of a single command 1 of 5 ...

Page 98: ...C141 E123 01EN 1 80 Figure 1 35 Example of bus phase transition at execution of a single command 2 of 5 ...

Page 99: ...C141 E123 01EN 1 81 RESELECTION Figure 1 35 Example of bus phase transition at execution of a single command 3 of 5 ...

Page 100: ...C141 E123 01EN 1 82 Figure 1 35 Example of bus phase transition at execution of a single command 4 of 5 ...

Page 101: ...C141 E123 01EN 1 83 Figure 1 35 Example of bus phase transition at execution of a single command 5 of 5 TASK COMPLETE ...

Page 102: ...ominant SCAM initiator when it broadcasts the numerically highest ID character string during separation The SCAM initiator which does not have the highest ID character string is set to a subaudinate SCAM initiator Notes The level 1 SCAM initiator is not always required for execution of the Dominant Initiator Contention function It shall be used to detect the Dominant Initiator Contention function ...

Page 103: ...rameters This can eliminate the requirement of SCSI ID classification SCSI ID assignment After all SCSI IDs have been classified the dominant SCAM initiator shall start the SCAM protocol and repeat ID assignment to all SCSI devices The dominant SCAM initiator shall execute the Dominant Initiator Contention function sequence to prove that the initiator is still dominant by itself If the previously ...

Page 104: ...SCSI selection When the SCAM target detects the start of SCAM protocol it shall enter the ID Assignable status If the SELECTION phase of the current IDs of SCAM target continues to valid during at least the response delay of SCAM unassigned ID selection this SCAM target shall respond to the selection and assert the BSY signal The SCAM target shall implicitly enter the ID Assigned status as if its ...

Page 105: ...thin the response time of SCAM tolerant selection but does not respond or recognize the SCAM selection The SCAM target can enter the Reset Delay status and allow local initialization by the reset status The SCAM target exists this status and enters the SCAM Monitor status within a SCAM reset to SCAM selection delay 3 Level 2 SCAM target Figure 1 37 shows the operations of level 2 SCAM target Its s...

Page 106: ...nction When the SCAM target is separated and its Assign ID action code is received the specified ID is set to the current and already assigned ID The SCAM target releases all SCSI bus signals and enters the Assigned ID status When the SCAM target receives a Configuration Process Complete function code or the SCAM protocol has ended if the C D signal becomes false the target shall release all SCSI ...

Page 107: ...with the higher data speed are included in this Standard 1 10 2 Device connection 1 Connection between an single ended transceiver and device The maximum length of accumulated signal path between terminators shall be 3 0 m if up to four 25 pF capacitance devices are used The maximum length of accumulated signal path between terminators shall be 1 5 m if five to eight devices that have maximum capa...

Page 108: ...ed for SCSI devices The end of bus shall be defined at each end point The end point can be inside of an SCSI device Single ended bus signals not defined as RESERVED GROUND or TERMPWR shall be terminated at each bus end securely Each signal termination shall satisfy the following requirements 1 Each terminator shall be powered from the TERMPWR line 2 Each terminator shall feed the current to a sign...

Page 109: ...ate or High Impedance state Each signal supplied by the SCSI device shall have the following output characteristics when measured at the connector position of SCSI device 1 VOL Low level output voltage 0 0 to 0 5 VDC if IOL 48 mA Signal assert state 2 VOH High level output voltage 2 5 to 3 7 VDC Signal negate state 3 The output characteristics in signal negate state shall be limited to allow opera...

Page 110: ...f Figure 1 39 cannot be used for this measurement Figure 1 38 Comparison of active negate current and voltage All single ended type drivers shall keep the high impedance state between the power on and power off cycles The SCSI device shall satisfy the following specifications if the load capacitor CL is within 15 pF 5 and if the unbalanced test circuit of Figure 1 39 is used for measurement 1 tris...

Page 111: ...in False signal 3 IIL Low level input current 20 µA if VI 0 5 VDC 4 IIH High level input current 20 µA if VI 2 7 VDC 5 Minimum input hysteresis 0 3 VDC The transient leakage current which may be generated during physical insertion of an SCSI device for example at the ESD protection circuit shall be the exponentially decreasing current to be less than the following specifications value 1 IIH HP Hig...

Page 112: ...5 2 compared ST data transfer mode The act of verifying that the physical layer is able to transfer test data at the negotiated speed and width between the INIT and TARG i e a quick check for physical domain validation For example two wide SCSI devices connected with a narrow cable will discover that the cable does not support wide transfers during this checking These SCSI devices will then re neg...

Page 113: ...and common mode signals Asymmetry occurs when the intensity of the source 2 and 4 assertion pair is different from the source 1 and 3 negation pair To compensate for the negation biasing effect of the terminators the 2 and 4 assertion pair is stronger than the 1 and 3 negation pair 1 11 4 LVD receiver characteristics LVD receivers should be connected to the signal and signal as shown in Figure 1 4...

Page 114: ...e measurements shall be made with a nominal 1MHz source with the same nominal D C level on the signal and the signal as specified in Table 1 20 The driving source from the instrumentation shall apply an A C signal level less than 100 mV rms Devices containing the enabled bus termination shall have maximum values 1 5 times the maximums listed in Table 1 20 Differential bus termination circuitry tha...

Page 115: ...r siganls C1 C2 pF 1 5 REQ ACK and DB 15 0 P_CRCA P1 C1 C2 pF 3 All other signal C1 C1 REQ pF 2 For C1is any capacitance of DB 15 0 P_CRCA P1 C2 C2 REQ pF 2 For C2is any capacitance of DB 15 0 P_CRCA P1 C1 C1 ACK pF 2 For C1is any capacitance of DB 15 0 P_CRCA P1 C2 C2 ACK pF 2 For C2is any capacitance of DB 15 0 P_CRCA P1 1 11 6 System level requirements for LVD SCSI drivers and receivers The req...

Page 116: ...aused by the addition of device capacitive load 4 This is the difference in voltage signal commons for SCSI devices on the bus 1 12 SCSI bus fairness 1 Fairness Model Implementation of the SCSI bus fairness is optional A SCSI device determines fairness by monitoring prior arbitration attempts by other SCSI devices It shall put off arbitration for itself until all lower priority SCSI devices that l...

Page 117: ...d requires that the SCSI IDs of all arbitrating SCSI devices appear on the bus within a Bus Set Delay since BSY was first asserted After this time a SCSI device examines the bus to detect arbitrating situation Since the lower priority SCSI IDs begin to disappear after an Arbitration Delay from the assertion of BSY the data bus shall be sampled after a Bus Set Delay but before an Arbitration Delay ...

Page 118: ...en two SCSI devices on the SCSI bus in order to control a series of bus phase sequence during command execution The messages are transferred over the SCSI data bus in the MESSAGE OUT and MESSAGE IN phases 2 1 1 Message format There are three message formats are listed below The first byte of the message is a message code in any format See Figure 2 1 One byte message This consists of a message code...

Page 119: ...C141 E123 01EN 2 2 Figure 2 1 Message format 2 1 2 Message type Message types are shown in Tables 2 1 and 2 2 Function of each message is explained in detail in Section 2 3 ...

Page 120: ...TE 1 TARG INIT 0C TARGET RESET 1 TARG INIT 0D ABORT TASK 1 TARG INIT 0E CLEAR TASK SET 1 TARG INIT 12 CONTINUE TASK 1 TARG INIT 13 TARGET TRANSFER DISABLE 1 TARG INIT 20 SIMPLE 2 TARG INIT 21 HEAD OF QUEUE 2 TARG INIT 22 ORDERED 2 TARG INIT 23 IGNORE WIDE RESIDUE 2 TARG INIT 80 to FF IDENTIFY 1 TARG INIT Note If a signal is identified by an asterisk in the ATN release column its ATN signal shall b...

Page 121: ...NTION condition If SCSI device supports messages other than TASK COMPLETE message the SCSI device creates ATTENTION condition or responds to the ATTENTION condition To indicate that the TARG can support messages other than TASK COMPLETE message the TARG initiates MESSAGE OUT phase in response to ATTENTION condition Note If the INIT is in the ARBITRATION phase and if it generates an ATTENTION condi...

Page 122: ... restored implicitly and the Saved pointer value is set to the current pointer value 2 2 SCSI Pointer The SCSI pointer feature is required by the INIT to control the command execution on the SCSI bus It allows multiple TARGs and logical units to process multiple commands concurrently and allows the TARG to retry processing in bus phases 1 Type of pointers The following three types of SCSI pointers...

Page 123: ... value of the command Therefore if the command disconnect is expected during data transfer the TARG shall save the current data pointer values by issuing the SAVE DATA POINTER message before issuing the DISCONNECT message Note As the TARG may set any pointer value before starting disconnect processing or command termination the pointer value of the INIT may or may not point to the byte position of...

Page 124: ...C141 E123 01EN 2 7 Figure 2 2 SCSI pointer configuration ...

Page 125: ... bus in MESSAGE OUT or COMMAND phase When the TARG completes normal message transfer it enters the BUS FREE phase The TARG determines that the message transfer has completed normally if the ATN signal is false when the ACK signal becomes false 2 3 2 SAVE DATA POINTER message X 02 T I The SAVE DATA POINTER message requests the INIT to save the current data pointer When receiving this message the IN...

Page 126: ...performs the following regardless of the ATN signal status If the LUN has been determined prior to this message the TARG clears all of the currently executing or queued I O operations which have been initiated to the specified logical Unit by the source INIT of this message and enters the BUS FREE phase All of the hold data and status information or the sense data of the logical unit and INIT are ...

Page 127: ...message after negating the ACK signal associated with the rejected message if it is received in the MESSAGE OUT phase This is required to allow the INIT to identify the rejected message Section 3 1 explains the IDD operation details when the INIT returns this message in response to the message sent by the IDD 2 3 8 NO OPERATION message X 08 I T The NO OPERATION message does not result in any opera...

Page 128: ... cleared No status or end message is sent to the INIT This message does not affect on the held status data and commands of the I O operations which are being executed or queued by another unit Also this message does not abort another I O operation which is queued in the INIT of this message source The system environment and conditions previously established by the MODE SELECT parameter are not cha...

Page 129: ... message out phase Otherwise the TARG may treat the connection as an overlapped command The INIT should avoid sending this message to the TARG that have not implemented this message Such the TARG may not respond as described in this section An application client can determine whether a device server implements this message by examining the TRANDIS bit in the standard INQUIRY data The application c...

Page 130: ...y examining the TRANDIS bit in the standard INQUIRY data The application client shall inform the INIT to use the CONTINE TASK message by issuing a TARGET TRANSFER DISABLE link control function in the send SCSI command phase 2 3 16 Task attribute messages Bit Byte 7 6 5 4 3 2 1 0 0 Message Code X 20 X 21 or X 22 1 TAG X 00 X FF The task attribute messages define a queue tag of I O operation The TAG...

Page 131: ...to INIT when not coming up to the width of the data bus which the number of bytes of data which transfers to INIT by the last REQ ACK handshake of the DATA IN phase and the REQB ACKB handshake uses in the place where the wide data transfer is executed When it is necessary to send this message TARG executes the MESSAGE IN phase without fail immediately after the end of the DATA IN phase and transmi...

Page 132: ...gical unit for I O operations Also after the RESELECTION phase has completed the TARG shall send the IDENTIFY message to the INIT as the first message to inform the logical unit to be reconnected When an I O operation path is established between the INIT and the TARG within a single SELECTION or RESELECTION sequence only a single LUN can be specified The second IDENTIFY message specifying a new LU...

Page 133: ...ed for data reception by SCSI devices It is the minimum time between the leading edge of an REQ pulse and the leading edge of the next REQ pulse or between the leading edge of an ACK pulse and the leading edge of the next ACK pulse The REQ ACK Offset is the maximum number of REQ pulses an offset which the TARG can send before receiving an ACK response the leading edge of ACK signal from the INIT T...

Page 134: ...NSFER REQUEST REQ ACK Offset 0 Asynchronous mode MESSAGE REJECT Asynchronous mode 2 Procedures of the message exchange initiated by the INIT If the INIT has recognized the synchronous data transfer to be set it asserts the ATN signal that is generating an ATTENTION condition for message exchange and requests the TARG to receive the SYNCHRONOUS DATA TRANSFER REQUEST message After the MESSAGE OUT ph...

Page 135: ...ve the response by the INIT normally after the specified number of retries the TARG shall negate the BSY signal and shall enter the BUS FREE phase immediately without executing another INFORMATION TRANSFER phase The INIT shall consider it as the unsuccessful message exchange and the two SCSI devices shall select the asynchronous data transfer mode between them If the TARG enters the MESSAGE IN pha...

Page 136: ...her the IDD starts the negotiation if necessary it can specify using the CHANGE DEFINITION command Table 2 4 Synchronous mode data transfer request setting SDTR bit Operation 0 Even if the IDD recognizes that the synchronous mode transfer and wide mode transfer settings are necessary the IDD does not send the SYNCHRONOUS DATA TRANSFER REQUEST message However when the INIT sends the SYNCHRONOUS DAT...

Page 137: ...n the INIT moves to the default transfer mode c Transfer mode when the SCSI ID is not defined for INITs Even if the SCSI ID of the INIT is not posted in the SELECTION phase if a single INIT is used and if it does not use the RESELECTION phase the message can be exchanged and the data transfer mode can be selected between the IDD and the INIT In this case the IDD sets a unique data transfer mode fo...

Page 138: ...nsfer Period X 11 Synchronous mode 13 3 MB s max 8 bit mode 26 6 MB s max 16 bit mode REQ Period 75 ns ACK Period 75 ns X 13 76 ns X 19 100 ns SDTR Transfer Period Specified value by INIT Synchronous mode 10 0 MB s max 8 bit mode 20 0 MB s max 16 bit mode REQ Period 100 ns ACK Period 100 ns X 1A 104 ns X 1F 124 ns SDTR Transfer Period Specified value by INIT Synchronous mode 8 00 MB s max 8 bit mo...

Page 139: ...om the IDD and the data transfer mode set to the IDD and INIT by the response of this message from the INIT If the INIT does not respond as defined on Table 2 6 the IDD assumes that the synchronous data transfer is unavailable and selects the asynchronous data transfer mode between the IDD and the INIT If an ATTENTION condition has occurred in the COMMAND phase and if the IDD has entered the BUS F...

Page 140: ... ns Synchronous mode 13 3 MB s max 8 bit mode 26 6 MB s max 16 bit mode REQ Period 75 ns ACK Period Specified value by INIT X 13 76 ns X 19 100 ns Synchronous mode 10 0 MB s max 8 bit mode 20 0 MB s max 16 bit mode REQ Period 100 ns ACK Period Specified value by INIT X 1A 104 ns X 1F 124 ns Synchronous mode 8 00 MB s max 8 bit mode 16 0 MB s max 16 bit mode REQ Period 125 ns ACK Period Specified v...

Page 141: ...shall exchange the WIDE DATA TRANSFER REQUEST message with another SCSI device before exchanging the SYNCHRONOUS DATA TRANSFER REQUEST message If the SCSI device having the wide mode transfer function receives the WIDE DATA TRANSFER REQUEST message the data transfer mode is reset to the asynchronous transfer mode 1 Wide mode parameters The data bus width between two SCSI devices is determined by e...

Page 142: ... the error recovery procedure based on the SCSI Bus protocol for the erroneous phase up to 3 times If the retry fails this negotiation is regarded as a failure The mode setting for wide transfer between the INIT and the TARG must be set to the 8 bit data bus width 3 Message exchange started by the TARG If the TARG recognizes the need of message exchange and if the wide data mode transfer request i...

Page 143: ...her the IDD sends the WIDE DATA TRANSFER REQUEST message to the INIT by sending the CHANGE DEFINITION command For details on setting refer to Section 3 1 4 in the SCSI Logical Specifications b Data bus width status determination a Default 8 bit mode status The default 8 bit data bus width mode is selected automatically when the power supply is turned on a RESET condition occurs or the TARGET RESET...

Page 144: ...X 01 Transfer Width Exponent 00 8 bit width Transfer Width Exponent 01 16 bit width X 02 or larger Transfer Width Exponent 01 16 bit width d Wide mode setting from the IDD to the INIT If the WIDE DATA TRANSFER REQUEST message is enabled to send by the CHANGE DEFINITION command and if the default 8 bit data bus width mode has been selected between the IDD and the INIT the IDD executes one of the fo...

Page 145: ... 16 bit width 2 3 21 PARALLEL PROTOCOL REQUEST message I T Byte 0 1 2 3 4 5 6 7 X 01 X 06 X 04 m X 00 n x y m Transfer Period Factor 4 m ns n REQ ACK OFFSET x Transfer Width Exponent Transfer width 2x bytes y Protocol Options Bit Bit 7 6 5 4 3 2 1 0 Byte7 Reserved QAS_REQ DT_REQ IU_REQ QAS_REQ Quick Arbitration Request DT_REQ Double Transfer Request IU_REQ Information Unit Request The PARALLEL PRO...

Page 146: ...2 bytes depending on the values in the transfer width exponent field For DT synchronous data transfer the REQ ACK OFFSET is the maximum number of REQ transitions allowed to be outstanding before a corresponding ACK transition is received at the TARG The size of a data transfer shall be 2 bytes See Section 1 5 for an explanation of the differences between DT and ST data transfers The REQ ACK OFFSET...

Page 147: ...at DT DATA phases are to be disabled when received from the originating SCSI device and that DT DATA phases are not supported when received from the responding SCSI device An DT_REQ bit of one indicates that DT DATA phases are to be enabled when received from the originating SCSI device and that DT DATA phases are supported when received from the responding SCSI device A QAS enable request bit QAS...

Page 148: ... eight bit wide data transfer mode with all the protocol options bits set to set to zero A SCSI device may initiate a PARALLEL PROTOCOL REQUEST message exchange whenever it is appropriate to negotiate a data transfer agreement SCSI devices that are currently capable of supporting any of the PARALLEL PROTOCOL REQUEST options shall not respond to a PARALLEL PROTOCOL REQUEST message with a MESSAGE RE...

Page 149: ...QUEST message implied agreement Responding SCSI device PARALLEL PROTOCOL REQUEST response Implied agreement Non zero REQ ACK offset Synchronous transfer i e Each SCSI device transmits data with a period equal to or greater than and a REQ ACK offset equal to or less than the negotiated values received in the responding SCSI device s PPR message REQ ACK offset equal to zero Asynchronous transfer Non...

Page 150: ...d ST DATA OUT phases between the two SCSI devices Following a TARG s responding PARALLEL PROTOCOL REQUEST message an implied agreement for data transfers shall not be considered to exist until a the INIT receives the last byte of the PARALLEL PROTOCOL REQUEST message and parity is valid and b the TARG does not detect an attention condition on the last byte of the PARALLEL PROTOCOL REQUEST message ...

Page 151: ...IT should issue the REQUEST SENSE command to obtain the error information 3 1 Error Conditions and Retry Procedure 1 MESSAGE OUT phase parity error When the IDD detects a parity error of the SCSI bus during the MESSAGE OUT phase it retries the MESSAGE OUT phase up to 3 times If the IDD fails to recover a parity error it proceeds to the next procedure For details see Section 1 6 9 If the LUN is alr...

Page 152: ...BORTED COMMAND B INITIATOR DETECTED ERROR message received 48 00 If the LUN is not identified yet the IDD does not generate the sense data and enters the BUS FREE phase immediately If the STATUS phase has already completed the IDD also enters the BUS FREE phase but does not send the status again 5 Receiving a MESSAGE PARITY ERROR message If the IDD receives a MESSAGE PARITY ERROR message from the ...

Page 153: ...mmand is attempted and the IDD does not report the command completion status and message At this time the IDD creates the sense information with Sense Key Additional Sense Code of ABORTED COMMAND B Message Error 43 00 d LINKED TASK COMPLETE The IDD immediately enters the BUS FREE phase without requesting the next linked command CDB The command link is broken Then the IDD creates the sense informat...

Page 154: ...e IDD sets the data transfer width to the 8 bit mode and the asynchronous mode and continues command execution k PARALLEL PROTOCOL REQUEST The IDD assumes that the INIT does not support the DT DATA IN OUT transfer mode The IDD sets the data transfer mode to the 8 bit width mode and the asynchronous mode and continues command execution 7 Reselection timeout If the INIT does not respond within the s...

Page 155: ...he IDD considers it as an error in the message protocol and enters the BUS FREE phase immediately IDENTIFY ABORT TASK TARGET REST 9 Internal controller error If a hardware or firmware error inside of the IDD is detected and if the LUN is already identified the IDD abnormally terminates the currently executing command in the CHECK CONDITION status In such case the IDD generates the sense data which...

Page 156: ...nsiders that the LUN is not identified and it enters the BUS FREE phase immediately Table 3 1 gives and outline of the retry procedure for handling SCSI bus errors If the IDD performs the error recovery Table 3 1 means the operation after the error recovery fails The symbols used in this table are as follows LUN I An LUN is already identified N An LUN is not yet X Don t care GOOD GOOD status CHECK...

Page 157: ...TED COMMAND MESSAGE REJECT I CHECK ABORTED COMMAND N BUS FREE NO SENSE RESTORE POINTERS I CHECK BASED ON ORIGINAL ERROR SAVE DATA POINTER I Continues the command execution without disconnection SIMPLE I BUS FREE ABORTED COMMAND SYNCHRONOUS DATA TRANSFER REQUEST X Sets data transfer mode to asynchronous mode and continues the command execution WIDE DATA TRANSFER REQUEST X Sets wide transfer mode to...

Page 158: ...nnecessary during command processing Initiator SCSI device that has initiated an input output operation on the SCSI device This can be abbreviated as INIT Logical unit Simple unit of equipment that can be directed to perform one I O operation on the SCSI bus LUN Logical unit number used to identify a logical unit LUT A logically assigned unit which can perform I O operations on the SCSI bus Messag...

Page 159: ...the class of the detected error Status One byte of information that is transferred from a target to an initiator on termination of each command to indicate the command termination status Target SCSI device which performs I O initiated by an initiator It can be abbreviated as TARG ...

Page 160: ...ifier IDD Intelligent Disk Drive INIT INITiator ISO International Standardization Organization L LSB Least Significant Byte LUN Logical Unit Number LVD Low Voltage Differential M MSB Most Significant Byte MSG MeSeaGe O OEM Original Equipment Manufacturer P PPR Parallel Protocol Request R REQ REQuest RST ReSeT S SCSI Small Computer System Interface SDTR Synchronous Data Transfer Request SE Single E...

Page 161: ... Almagro 40 28010 Madrid SPAIN TEL 34 91 681 8100 FAX 34 91 681 8125 FUJITSU AUSTRALIA LIMITED 2 Julius Avenue Cnr Delhi Road North Ryde N S W 2113 AUSTRALIA TEL 61 2 9776 4555 FAX 61 2 9776 4556 FUJITSU HONG KONG LTD 10 F Lincoln House 979 King s Road Taikoo Place Island East Hong Kong TEL 852 2827 5780 FAX 852 2827 4724 FUJITSU KOREA LTD Coryo Finance Center Bldg 23 6 YoulDo Dong Young DungPo Gu...

Page 162: ...of this publication What is your occupation Your other comments may be entered here Please be specific and give page paragraph and line number references where applicable Your Name Return Address Sales Operating Installing Maintaining Learning Reference Fair Poor Very Good Good Very Poor Fully covered Well Illustrated Thank you for your interest Please send this sheet to one of the addresses in a ...

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