EMA-MB91F467S-LS-176M07
Contents
FMEMCU-UG-910070-17
© Fujitsu Microelectronics Europe GmbH
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0 Contents
REVISION HISTORY ............................................................................................................ 2
WARRANTY AND DISCLAIMER ......................................................................................... 3
0 CONTENTS...................................................................................................................... 4
1 OVERVIEW...................................................................................................................... 5
1.1
Abstract................................................................................................................... 5
1.2
General Description................................................................................................. 6
1.3
Functional Restrictions ............................................................................................ 7
2 INSTALLATION ............................................................................................................... 9
3 SWITCHES AND JUMPERS.......................................................................................... 10
3.1
Level Shifter Switches and Jumpers overview....................................................... 10
3.2
Level-shifter direction control jumper ..................................................................... 11
3.3
Bus control jumpers............................................................................................... 12
3.4
Port 17 Jumpers (APIX AIC Link) .......................................................................... 16
3.5
Default Jumper Setting .......................................................................................... 17
4 MECHANICAL DIMENSIONS........................................................................................ 19
5 CPLD ............................................................................................................................. 20
5.1
CPLD Verilog Code ............................................................................................... 20
5.2
CPLD Constraints.................................................................................................. 22
5.3
CPLD programming jumper (J491)........................................................................ 22
6 INFORMATION IN THE WWW....................................................................................... 23
7 CHINA-ROHS REGULATION ........................................................................................ 24
8 RECYCLING .................................................................................................................. 26
