FujiFilm FinePix S5200, Service Manual

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3. Schematics
FinePix S5200/S5600 Service Manual
3-3. Description of Main Block Functions
3-3-1. Technical Overview
The FinePix S5200/S5600 features the newly developed 5th-Generation Super CCD HR image sensor combines higher
sensitivity with the advanced noise suppression capabilities of the new RP Processor to fully exploit the image quality and
resolution of 5.1 effective megapixels. Even photos taken in typically noisy situations such as twilight and under other low-light
conditions retain the subtle tonality you saw your own eyes.
The newly developed Fujinon 10x optical zoom lens offers a focal range equivalent to a 38-380mm zoom on a 35mm camera.
This lens employs 11 elements in 8 groups, including two aspherical elements and two AD (Anomaious Dispersion) elements,
yielding unparalleled optical quality throughout the entire zoom range.
CCD signal processing/Camera circuit section
„ Analog signals output from the 1/12.5 type Super-CCD Honeycom V HR (IC1), with an effective pixel count of 5.1 mega-
pixels, undergo false color compensation processing, adaptive interpolation processing, amplification (AGC) and signal
mixing inside the CCD signal processing IC “BCS (IC104)” before being converted to 14-bit digital signals (A/D) and sent
to the signal processing LSI “YCS (IC204)”.
„ The vertical drive IC (IC102) for driving the CCD and the OFD voltage control IC (IC101) are in this block.
Motor Circuit Section
„ The signal processing LSI “YCS (IC204)” that has received various operating switch commands manages the motor drive
IC (IC151) and controls the AF, ZOOM, SHUTTER and IRIS motors.
Imaging and Signal Processing Section
„ Input data from the CCD
14-bit digital image data (corresponding to 1H) that has been output from the imaging section (CCD/Camera Block) is
sent to the signal processing LSI “YCS (IC204)”, converted to 32-bit (16-bit x 2) data by the [internal buffer] inside this
LSI, and the image data for one frame (2592 x 1944 pix) is stored temporarily in [SD-RAM]. It is also integrated in the
[AUTO operation section] using the 32-bit the signal processing LSI “YCS (IC204)” image data and sent to the BCS_IC
(IC104) to obtain the appropriate AE/AF/AWB.
„ Record processing to xD Card
Image data stored in SD-DRAM is sent one frame at a time to the internal [signal processing section] in the signal
processing LSI “YCS (IC204)”. In a process called unpacking, “32-bit to 12-bit conversion” and “pre-processing including
digital clamp, white balance and noise reduction processing, linear matrix processing, gamma correction and R/G/B 14-bit
to R/G/B 8-bit conversion” to “8-bit digital R/G/B signals to Y:Cb:Cr = 4:2:2 YC processing•Eare implemented in this
[signal processing section] and 8-bit Y/Cb/Cr image data are sent to the [internal buffer].
The “rearrangement of data in a format in which 8-bit Y/Cb/Cr signals are easily compressed” is done in the [internal
buffer] and after passing through the [JPEG operation block] to the [media controller], they are recorded on the xD card.
„ Reproduction of images from xD card
Compressed image data from the xD card is sent as 8-bit image data to the signal processing LSI “YCS (IC204)” then it is
sent to the [media control section], the [DMA unit] and the SD-DRAM and then it is sent to the [media controller], to the
[JPEG operation section] and to the [signal processing section].
In the [signal processing section], 8-bit Y/Cb/Cr signals are converted to 8-bit R/G/B signals and at the same time,
lettering display signals are weighted and passed through the [LCD controller (IC451)] to the LCD unit and displayed.
„ Image capture system adjustment data are stored in the Flash ROM.
LCD Unit
„ Digital signals sent from the signal processing LSI “YCS (IC204)” are passed through the [LCD controller (IC451)] to the
LCD unit.
Power Supply Section
„ Power supply circuits constructed in the core of the DC IC (IC301) create the following power supplies, which are
supplied to each block.
3.3V
[IC202 (PROCESS BLOCK)]
D_3.3V [IC204 (YCS), IC401 (IPS2), IC151 (MOTOR BLOCK)]
AD_3.3V [IC204 (YCS), IC271 (VIDEO Drv), TOP FPC, KEY BLOCK]
AU_3.3V [IC281 (AUDIO)]
CAM3.3V [IC102 (V_Drv), IC104 (BCS)]
xD_3.3V [CN261 (xD CARD CONNECTOR)]
D_5V [IC102 (V_Drv), IC401 (IPS2), LCD/EVF BLOCK]
BL_5V [LCD/EVF BLOCK]
MOT_5V [IC302, IC303 (MOTOR BLOCK)]
CCD_-8V [IC1 (CCD), IC102 (V_Drv)]
CCD_15V [IC1 (CCD), IC102 (V_Drv), IC101 (OFD_Drv)]
1.0V [IC204 (YCS), IC401 (IPS2)]
2.5V [IC204 (YCS)]
D_2.5V [IC204 (YCS)]
LCD_8.5V [LCD/EVF BLOCK]