1-25
Section 1 Specifications
(5) Memories related to high-speed counter %WM1.61536 to %WM1.61561, %WM3.61536 to %WM3.61577
These are special relays/registers for the high-speed counter function built in the main unit.
1) High-speed counter control flag %MW1.61536 to %MW1.61538
Address
Name
Description
Attribute
%MX1.61536.0
High-speed counter CH0
count enable/disable
Sets the counting operation of the high-speed counter.
ON: Disable counting, OFF: Enable counting
* This setting is reflected at the end of the scan.
R/W
|
|
%MX1.61536.7
High-speed counter CH7
count enable/disable
%MX1.61536.8
|
%MX1.61536.15
Not used
%MX1.61537.0
High-speed counter CH0
current value clear
Clears the counter current value of the high-speed counter.
ON: Clear, OFF: Clear release
* Operation is performed at the end of the scan.
R/W
|
|
%MX1.61537.7
High-speed counter CH7
current value clear
%MX1.61537.8
|
%MX1.61537.15
Not used
%MX1.61538.0
High-speed counter CH0
latch status
ON when the latch status is ON at the end of the scan or at the
execution of the high-speed counter current value latch instruction
(R_HSC_LATCH).
* Set to OFF this memory by an application.
R/W
|
|
%MX1.61538.7
High-speed counter CH7
latch status
%MX1.61538.8
|
%MX1.61538.15
Not used
Address
Name
Description
Attribute
%MD1.61546
High-speed counter CH0
current value latch data
Stores the latch data of the high-speed counter current value.
* Updated at the end of the scan or at the execution of the high-
speed counter current value latch instruction (R_HSC_LATCH).
R
|
|
%MD1.61560
High-speed counter CH7
current value latch data
2) High-speed counter current value latch data %MD1.61546 to %MD1.61560
