3-1
Section 3 System Definition
Name
Definition
Related page
Recognition
timing
System configuration
definition
Registration of units existing in the configuration (system)
Section 3-2
When reset
CPU running definition
Specification of watchdog timer, constant scan, I/O status
latch, and built-in flash memory mismatch LED indication
Section 3-3-1
When
downloaded
Battery-less operation
Section 3-3-1
When reset
CPU memory size definition
Specification of the size of various data memories, AT range,
and reserved area for rewriting a program during PLC
operation
Section 3-3-2
When reset
I/O group setting
Registration of digital I/O of the main unit in tasks
Section 3-3-3
When reset
Remote RUN/STOP
Specification of remote RUN/STOP bits (input)
Section 3-3-4
When reset
Input filtering time
Specification of the input filtering time for the digital input of
the main unit
Section 3-3-5
When reset
High-speed counter setting
Mode setting (U/D, P/R, A/B, multiplication, etc.), terminal
selection, and signal polarity setting for the high-speed
counter built in the main unit
Section 3-3-6
When started
High-speed pulse output
setting
Mode setting (A/B, U/D, P/R, PWM, PLS), and signal polarity
setting for the high-speed pulse output built in the main unit
Section 3-3-7
When started
Communication adapter
parameters
Communication mode, communication specifications (baud
rate, data length, etc.), CPU link setting, etc.
Dedicated manual
(FEH528)
When reset
3-1 System Definition Summary
Notes:
1) “Reset” means to perform the reset operation from the loader or to reset the system power (at power on).
2) For the parameter settings of other units, refer to the manual for the corresponding unit.
