Chapter 3. Hardware Description and Reconfiguration
3-5
The Processor and Support Logic
Table 3-1 shows the M5407C3 memory maps.
All the unused area of the memory map is available to the user.
3.1.9 Reset Vector Mapping
After reset, the processor attempts to get the initial stack pointer and initial program counter
values from locations $000000-$000007 (the first eight bytes of memory space). This
requires the board to have a nonvolatile memory device in this range with proper
information. However, in some systems, it is preferred to have RAM starting at address
$00000000. In MCF5407, the -CS0 responds to any accesses after reset until the CSMR0
is written. Since -CS0 (the global chip select) is connected to Flash ROM, the Flash ROM
appears at address $00000000 which provides the initial stack pointer and program counter
(the first 8 bytes of the Flash ROM). The initialization routine programs the chip-select
logic, locates the Flash ROM to start at $7FE00000 and the configures the rest of the
internal and external peripherals.
3.1.10 TA Generation
The processor starts a bus cycle by asserting -TS with other control signals. The processor
then waits for an acknowledgment (-TA) either from within (Auto acknowledge mode) or
by the externally addressed device before it can complete the bus cycle. -TA is used not only
to indicate the completion of the bus cycle, it also allows devices with different access times
to communicate with the processor properly (i.e. asynchronously). The MCF5407, as part
Table 3-1. The M5407C3 Memory Map
Address Range
Signal and Device
Memory Access Time
$00000000-$00020000
SDRAM space for dBug ROM monitor use
refer to manufacturer spec
$00020000-$00FFFFFF
SDRAM space
refer to manufacturer spec
$10000000-$100003FF
System Integration Module (SIM) registers
internal access
$20000000-$200007FF
SRAM0
internal access (1 clock)
$20000800-$20000FFF
SRAM1
internal access (1 clock)
$30000000-$300003FF
1
1
Not installed. SRAM footprint accepts Motorola’s MCM69F737TQ chip and any other SRAM with the same
electrical specifications and package.
-CS2, External SRAM
2-1-1-1
$40000000-$400FFFFF
-CS3, 1M Ethernet Bus Area
external TA from PLD (U18)
$7FE00000-$7FFFFFFF
-CS0, 2M Flash ROM
8-7-7-7
$FFFF0000-$FFFFFFFF
-CS1, PCI Bridge Chip
external TA from PCI (U17)
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