Freescale Semiconductor ColdFire MCF5274, User Manual

Page: 13 / 104

Chapter 1. M5275EVB Introduction 1-5
MCF5275 Microprocessor
Figure 1-2. MCF5275 Block Diagram
64 Kbytes
SRAM
(8Kx16)x4
EIM
V2 ColdFire CPU
INTC0
Watchdog
PIT0
JTAG
TAP
CACHE
(1Kx32)x4
PIT1 PIT2 PIT3
4 CH DMA
UART
0
UART
1
I
2
C
QSPI
DTIM
0
DTIM
1
DTIM
2
DTIM
3
Timer
PLL
CLKGEN
UART
2
16 Kbytes
Edge
Port
SDRAMC
CHIP
EBI
SELECTS
(To/From PADI)
(To/From
PORTS
CIM
(GPIO)
DIV EMAC
DREQ[1:0]
INTC1
Arbiter
(To/From SRAM backdoor)
(To/From Arbiter backdoor)
SKHA
RNGA
MDHA
Cryptography
Modules
DACK[3:0]
BD
M
(To/From INTC)
MUX
PADI)
JTAG_EN
P
A
DI – Pin Muxing
BS[3:2]
PWM n
USB
FEC0
DT n IN
DT n OUT
U n RXD
U n TXD
I2C_SDA
I2C_SCL
DDR
QSPI
U n RTS
U n CTS
D[31:16]
A[23:0]
R/W
CS[3:0]
TA
TSIZ[1:0]
TEA
FEC1
JTAG_EN
TRST
TCLK
TMS
TDI
TDO
(To/From
PADI)
(To/From PADI)
FAST ETHERNET
CONTROLLER
(FEC1)
FAST ETHERNET
CONTROLLER
(FEC0)
4 CH PWM
(To/From PADI)
USB 2.0
Full Speed
(To/From PADI)