Freescale Semiconductor CMB2103, User Manual

Page: 51 / 70

MMCCMB2103UM/D
User’s Manual
51
ETK Connector (J5)
Table 4-5 ETK Connector J5 Signal Descriptions
Pin Mnemonic Signal
1 — 4 P12V +12-volt input power.
5, 6, 7, 12, 18,
27, 30, 39, 46,
49, 51, 58, 67,
74, 76, 79, 81,
86, 87, 93, 95,
96, 98, 100 —
102, 104, 105,
107, 110, 112,
115, 117, 119,
122 — 124, 127,
128, 131, 132,
134 — 136, 138
— 143, 146, 155,
158, 159
GND GROUND
8, 11, 94, 114 VDD3V +3.3-volt power.
9, 103, 108, 111,
118, 120, 121,
137, 144, 145,
147 — 154, 156,
157, 160
NC No connection
10, 13 — 17, 19
— 26, 28, 29, 31
— 38, 40 — 45,
47, 48
DATA[0] —
DATA[31]
DATA BUS (lines 0—31) — Bi-directional data lines for accessing external
memory. A hardware reset or no external-bus activity hods these lines in their
previous logic state.
50, 52 — 57, 59
— 66, 68 — 73,
75
ADDR[1] —
ADDR[22]
ADDRESS BUS (lines 1—22) — Output lines for addressing external devices.
These lines change state only during external-memory accesses.
77 FLASHCS_b FLASH CHIP SELECT — General-purpose chip select for FLASH.
78 SGCSM_b ETK CHIP SELECT — General-purpose chip select for program data to the
dual port RAM.
80 RW_b READ/WRITE ENABLE — Active-low signal indicating that the current bus
access is a write access. Otherwise, the current bus access is a read access.
82 OE_b OUTPUT ENABLE — Active-low output that indicates that a bus access is a
read access; enables slave devices to drive the data bus.
83 FSRAMCS_b FSRAM CHIP SELECT – General-purpose chip select for data access in dual
port RAM.
84, 88, 91, 92 EB_b[0] —
EB_b[3]
ENABLE BYTES 0, 1, 3, 2 — Active-low outputs active during an operation to
corresponding data bits (D31-D24 for enable byte 0, D23-D16 for enable byte 1,
D15-D8 for enable byte 2, D7-D0 for enable byte 3).
85 SGOEF_b ETK FLASH OUTPUT ENABLE — Active-low output-enable signal for the
external FLASH.
89, 90 TSIZ[0], TSIZ[1] TRANSFER SIZE (lines 0, 1) — Signals that indicate the size of an external bus
transfer.
97 SGCSR_b ETK RAM CHIP SELECT — General-purpose chip select signal for program
RAM.
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