DSP56852EVM User Manual, Rev. 3
2-14
Freescale Semiconductor
2.10 Reset
Logic is provided on the 56852 to generate an internal Power-On RESET. Additional, reset logic
is provided to support the RESET signals from the JTAG connector, the Parallel JTAG Interface
and the user RESET push-button; refer to
Figure 2-9
.
RESET
PUSHBUTTON
MANUAL RESET
JTAG_TAP_RESET
JTAG_RESET
RESET
TRST
Figure 2-9. Schematic Diagram of the RESET Interface
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