Freescale Semiconductor 56852, User Manual

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Technical Summary, Rev. 3
Freescale Semiconductor 2-1
Chapter 2
Technical Summary
The 56852EVM is designed as a versatile controller development card for developing
real-time software and hardware products to support a new generation of applications in
digital and wireless messaging, digital answering machines, feature phones, modems, and
digital cameras. The power of the 16-bit 56852, combined with the on-board
128K
u
16-bit external program/data static RAM (SRAM), 128K
u
16-bit external
data/program SRAM, RS-232 interface, stereo 16-bit codec interface, Daughter Card
Expansion interface and parallel JTAG interface, makes the 56852EVM ideal for
developing and implementing many audio and voice algorithms, as well as for learning the
architecture and instruction set of the 56852 processor.
The main features of the 56852EVM, with board and schematic reference designators
include:
• 56852 16-bit +1.8V/+3.3V Digital Signal Processor operating at 120MHz [U1]
• External fast static RAM (FSRAM) memory, configured as:
— 128K
u
16-bit of memory [U2] with 1 wait state at 120MHz via CS0
— 128K
u
16-bit of memory [U3] with 1 wait state at 120MHz via CS1/CS2
• 1M-bit Serial EEPROM/Data FLASH [U4]
• 4.00MHz crystal oscillator for controller frequency generation [Y1]
• Optional external oscillator frequency input connectors [JG3 and JG4]
• Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J3]
• On-board Parallel JTAG Host Target Interface, with a connector for a PC printer
port cable [P1]
• RS-232 interface for easy connection to a host processor [U6 and P6]
• 16-bit stereo codec interface [U5, JG9, JG10, P3 and P4]
• Stereo headphone interface [U12 and P5]