Forlinx FET6254-C, Hardware Manual

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Hardware manual
OK6254-C FET6254-C
www.forlinx.net
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under A/D multiplexed mode
GPMC0_AD8 IO
GPMC data 8 input/ output under A/ D
non-multiplexed mode, and extra address 9 output
under A/D multiplexed mode
P3_60
GPMC0_AD9 IO
GPMC data 9 input/ output under A/ D
non-multiplexed mode, and extra address 10
output under A/D multiplexed mode
P3_58
GPMC0_AD10 IO
GPMC data 10 input/ output under A/ D
non-multiplexed mode, and extra address 11
output under A/D multiplexed mode
P3_56
GPMC0_AD11 IO
GPMC data 11 input/ output under A/ D
non-multiplexed mode, and extra address 12
output under A/D multiplexed mode
P3_54
GPMC0_AD12 IO
GPMC data 12 input/ output under A/ D
non-multiplexed mode, and extra address 13
output under A/D multiplexed mode
P3_52
GPMC0_AD13 IO
GPMC data 13 input/ output under A/ D
non-multiplexed mode, and extra address 14
output under A/D multiplexed mode
P3_50
GPMC0_AD14 IO
GPMC data 14 input/ output under A/ D
non-multiplexed mode, and extra address 15
output under A/D multiplexed mode
P3_48
GPMC0_AD15 IO
GPMC data 15 input/ output under A/ D
non-multiplexed mode, and extra address 16
output under A/D multiplexed mode
P3_46
GPMC0_BE0n_CLE O
GPMC low byte enable(low power valid) or
command latch enable
P4_69
GPMC0_BE1n O GPMC high byte enable(low power valid) P4_73
GPMC0_CSn0 O GPMC chip select 0 P4_51
GPMC0_CSn1 O GPMC chip select 1 P4_53
GPMC0_CSn2 O GPMC chip select 2 P4_55
GPMC0_CSn3 O GPMC chip select 3 P4_57
GPMC0_WAIT0 I GPMC external wait indication P4_45
GPMC0_WAIT1 I GPMC external wait indication P4_47
2.6.14 IIC
MAIN Domain
Peripheral Signal I/O Default function Pin No.
IIC0
I2C0_SCL IOD IIC clock P2_50
I2C0_SDA IOD IIC data P2_52
IIC1
I2C1_SCL IOD IIC clock P2_54
I2C1_SDA IOD IIC data P2_56
IIC2
I2C2_SCL IOD IIC clock P4_55
I2C2_SDA IOD IIC data P4_57