
Control inputs #SBC-A and #SBC-B at [X1A]
Max. input voltage low-
level (U
L max
)
[V]
5
Min. input voltage low-
level (U
L min
)
[V]
–
3
Max. input current with
high-level (I
H max
)
[mA]
15
Min. input current with
high-level (I
H min
)
[mA]
5
Max. input current with
low-level (I
L max
)
[mA]
15
Min. input current in
transition range (I
T min
)
[mA]
1.5
Tolerance for low test pulses
Tolerated low test
pulses (t
SBC,TP
) up to
max.
[ms]
1
Min. time between low
test pulses at
U
H min
<
U
SBC-A/B
£
20 V
[ms]
200
Min. time between low
test pulses [ms]
atU
SBC-A/B
>
20 V
[ms]
100
Tolerance for high test pulses
1)
Tolerated high test
pulses (t
SBC,TP
) up to
max.
[ms]
1
Min. time between high
test pulses at
U
SBC-A/B
<
U
L max
[ms]
200
1) High test pulses must not occur simultaneously at inputs #SBC-A and #SBC-B but only with a time offset.
Tab. 26 Control inputs #SBC-A and #SBC-B at [X1A]
Technical data
42
Festo — CMMT-AS-...-S1 — 2018-10a
Summary of Contents for CMTT-AS S1 Series
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