General Software® BIOS
CPB902
C P B 9 0 2 U s e r M a n u a l
85
© 2 0 0 8 F a s t w e l v . 1 . 5 b E
5.11.4
ADM8697 Supervisor's Watchdog Timer Operation
This watchdog timer has fixed timeout period from 4.5 to 10.5 seconds depending on supervisor
chip parameters. Upon expiry of the timeout the WDT resets the system, unless it is reset by the
user program. Sample program code fragments for setting and recurring resetting the ADM8697
WDT are given below. To reset the WDT the GPIO6 line of the GPIO processor unit is used.
Attention!
GPIO3 … GPIO0 lines are used by the system.
Incorrect handling of these lines may lead to system failure.
//Enable GPIO unit
//32-bit output of the value 0x80006040 to 0xCF8 port
outpd(0xCF8,0x80006040);
//32-bit input from 0xCFC port
SB_MISC_REG_cont = inpd(0xCFC);
if(!(SB_MISC_REG_cont & 0x2))
{
outpd(0xCF8,0x80006040);
//Enable GPIO unit
outp(0xCFC,SB_MISC_REG_cont|0x02);
}
//Obtaining GPIO base address and saving it to gpio_base variable
outpd(0xCF8,0x80006044);
gpio_base = inpw(0xCFC)&0xFFFE;
//Check the GPIO line direction
direction_reg_cont = inp(gpio_base);
if(direction_reg_cont&0x40)
{
//Set GPIO6 line to output
outp(gpio_base,direction_reg_cont&0xBF);
}
//Get GPIO lines state from data source
read_control_reg_cont = inp(gp1);
if(read_control_reg_cont)
//GPIO state read directly from GPIO lines
outp(gp1,0x00);
//Reset the WDT in a user program
do
{
//Any actions …
//WDT reset
outp(gp6, inp(gp6)|0x40);
outp(gp6, inp(gp6)&0xBF);
//Any actions …
}while(!Exit);
More details on GPIO unit operation can be found in STPC Vega Programming manual.
